This page gives an overview of qspips driver which is available as part of the Xilinx Vivado and Vitis distribution.
Source path for the driver:https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/qspips
Driver source code is organized into different folders. Below diagram shows the qspips driver source organization
-- Doc - Provides the API and data structure details
- Examples - Reference application to show how to use the driver APIs and calling sequence
- Source - Driver source files
Features SupportedThe controller driver will be exclusive to LQSPI including API’s to be used for configuring the host controller and transmitting the data.
Commands Supported:The following list of basic commands are supported by the Standalone driver:
- Read Identification
- Read Page
- Program Page
- Erase (Chip/Sector Erase)
- Read Status
Controller Features Supported:The following features are supported in the QSPI Standalone driver.
- IO access
- Legacy SPI mode
- Linear addressing mode
- Control of two chip selects/bus
- Configurable clock
- Configurable bus width
- Interrupts – will be chosen and enabled internally
- Generic register read/write operations
- 3 byte addressing
- Flash configurations illustrated in examples – Single, Dual Stacked, Dual Parallel
Known issues and Limitations
Sample output of test cases that are taken from examples folder
|QSPIPS FLASH Polled Example Test|
Successfully ran QSPIPS FLASH Polled Example Test
|QSPIPS FLASH Interrupt Example Test|
Successfully ran QSPIPS FLASH Interrupt Example Test
SingleQspips write throughput is 362 KBPSQspips read throughput is 27675 KBPS
Dual-ParallelQspips write throughput is 644 KBPSQspips read throughput is 33573 KBPS
- Added support to read Qspi Bus Width parameter
- Added support for IS25LP256D serial flash in zynq
- Added support for low density ISSI flash parts of size 8/16/32/64Mb
- Fixed memory leak in driver.
- Updated driver to check for flash device ready before performing any operation.
- Fixed unused value coverity warning.
- Fill TX FIFO with valid data when RX buffer is not NULL.
- Fill TX FIFO with valid data when RX buffer is not NULL
- Updated Makefile to support parallel make execution
- Title 1 & Link 1
- Title 1 & Link 1