Qspips Standalone driver

Introduction

This page gives an overview of qspips driver which is available as part of the Xilinx Vivado and Vitis distribution.

Source path for the driver:
https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/qspips

Driver source code is organized into different folders. Below diagram shows the qspips driver source organization

qspips
|
-- Doc - Provides the API and data structure details
|
- Examples - Reference application to show how to use the driver APIs and calling sequence
|
- Source - Driver source files

Features Supported

The controller driver will be exclusive to LQSPI including API’s to be used for configuring the host controller and transmitting the data.

Commands Supported:

The following list of basic commands are supported by the Standalone driver:
  1. Read Identification
  2. Read Page
  3. Program Page
  4. Erase (Chip/Sector Erase)
  5. Read Status

Controller Features Supported:

The following features are supported in the QSPI Standalone driver.
  1. IO access
  2. Legacy SPI mode
  3. Linear addressing mode
  4. Control of two chip selects/bus
  5. Configurable clock
  6. Configurable bus width
  7. Interrupts – will be chosen and enabled internally

Example Applications:

  1. Generic register read/write operations
  2. 3 byte addressing
  3. Flash configurations illustrated in examples – Single, Dual Stacked, Dual Parallel

Known issues and Limitations

Test cases

Sample output of test cases that are taken from examples folder
QSPIPS FLASH Polled Example Test
Successfully ran QSPIPS FLASH Polled Example Test
QSPIPS FLASH Interrupt Example Test
Successfully ran QSPIPS FLASH Interrupt Example Test

Performance Details

Single

Qspips write throughput is 362 KBPS
Qspips read throughput is 27675 KBPS

Dual-Parallel

Qspips write throughput is 644 KBPS
Qspips read throughput is 33573 KBPS

Change Log

  • 2016.3

    • None
  • 2016.4

    • None
  • 2017.1

    • None
  • 2017.2

    • None
  • 2017.3

    • Summary
      • Added support to read Qspi Bus Width parameter
      • Added support for IS25LP256D serial flash in zynq
    • Commits
  • 2017.4

    • None
  • 2018.1

    • None
  • 2018.2

    • None
  • 2018.3

    • Summary
      • Added support for low density ISSI flash parts of size 8/16/32/64Mb
    • Commits
  • 2019.1

    • Summary
      • Fixed memory leak in driver.
      • Updated driver to check for flash device ready before performing any operation.
    • Commits
  • 2019.2

    • None
  • 2020.1

    • Summary
      • Fixed unused value coverity warning.
      • Fill TX FIFO with valid data when RX buffer is not NULL.
    • Commits
  • 2020.2

    • Summary
      • Fill TX FIFO with valid data when RX buffer is not NULL
      • Updated Makefile to support parallel make execution
    • Commits

Related Links

  • Title 1 & Link 1
  • Title 1 & Link 1