SCU Watchdog Standalone driver
This page gives an overview of SCU Watchdog BareMetal driver
Table of Contents
Introduction
The watchdog timer can be used to prevent system lockup; for example, when software becomes trapped in a deadlock.In normal operation, the user restarts the watchdog at regular intervals before the timer counts down to zero.
In cases where the timer does reach zero and the watchdog is enabled, one or a combination of the following signals is
Driver Sources
The source code for the driver is included with the Vitis Unified Software Platform installation, as well as being available in the Xilinx Github repository.
Driver Name | Path in Vitis | Path in GitHub |
---|---|---|
scuwdt | <Vitis Install Directory>/data/embedded/XilinxProcessorIPLib/drivers/scuwdt | https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/scuwdt |
Note: To view the sources for a particular release, use the rel-version tag in github. For example, for the 2020.1 release, the proper version of the code is: https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/scuwdt
The driver source code is organized into different folders. The table below shows the scuwdt driver source organization.
Directory | Description |
---|---|
src | Driver source files, make and cmakelists file |
examples | Example applications that show how to use the driver features |
doc | Provides the API and data structure details |
data | Driver .tcl , .mdd and .yaml files |
Note: The .yaml(in data folder) and CMakeLists.txt(in src folder) files would be used in System Device Tree based flow.
Driver Implementation
For a full list of features supported by this IP, please refer Chapter 14: Timers and clocks in Zynqmp Trm
Features
Controller/Driver features supported
- 32-bit counter that generates an interrupt when it reaches zero
- 8-bit prescaler to enable better control of the interrupt period
- Configurable single-shot or auto-reload modes
- Configurable starting values for the counter
- can be used in watchdog mode or timer mode
Known issues and Limitations
None
Example Applications
Refer to the driver examples directory for various example applications that exercise the different features of the driver. Each application is linked in the table below. The following sections describe the usage and expected output of the various applications. These example applications can be imported into the Vitis IDE from the Board Support Package settings tab.Links to Examples
Examples Path:
https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/scuwdt/examples
Test Name | Example source | Description |
---|---|---|
Polled | xscuwdt_polled_example.c | This example tests the functioning of the Scu Private WDT driver and hardware in Timer mode using polled mode. |
Interrupt | xscuwdt_intr_example.c | This example tests the functioning of the Scu Private WDT driver and hardware in Timer mode using interrupt mode. |
Example Application Usage
SCUWDT examples
Expected Output
Polled mode example
https://github.com/Xilinx/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/scuwdt/examples/xscuwdt_polled_example.cThis test contains a design example using the Xilinx SCU Private Watchdog Timer driver (XScuWdt) and hardware device in watchdog mode. It
illustrates how to initialize the watchdog device and restart it periodially in polling mode to avoid the assertion of the WDRESETREQ pin.
Output
SCU WDT Polled Mode Example Test Successfully ran SCU WDT Polled Mode Example Test
Interrupt mode example
https://github.com/Xilinx/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/scuwdt/examples/xscuwdt_intr_example.cThis file contains a design example using the Xilinx SCU Private Watchdog Timer driver (XScuWdt) and hardware in Timer mode using interrupts. It illustrates
how to use Watchdog device in the timer mode.
Output
SCU WDT Interrupt Example Test Successfully ran SCU WDT Interrupt Example Test
Example Design Architecture
- NA
Changelog
2024.1
- None
2023.2
2023.1
- None
2022.2
- None
2022.1
- None
2021.2
- None
2021.1
2020.2
2020.1
2019.2
- None
2019.1
- None
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