xilflash
Introduction
The XilFlash library provides read/write/erase/lock/unlock features to access a parallel flash device.
This library implements the functionality for flash memory devices that conform to the "Common Flash Interface" (CFI) standard. CFI allows a single flash library to be used for an entire family of parts and helps us determine the algorithm to utilize during runtime. All the calls in the library are blocking in nature in that the control is returned back to user only after the current operation is completed successfully or an error is reported.
Device Geometry
The device geometry varies for different flash device families. Following sections describes the geometry of
different flash device families:
Intel Flash Device Geometry
Flash memory space is segmented into areas called blocks. The size of each block is based on a power of 2. A
region is defined as a contiguous set of blocks of the same size. Some parts have several regions while others have one. The arrangement of blocks and regions is referred to by this module as the part's geometry. Some Intel flash supports multiple banks on the same device. This library supports single and multiple bank flash devices.
AMD Flash Device Geometry
Flash memory space is segmented into areas called banks and further in to regions and blocks. The size of
each block is based on a power of 2. A region is defined as a contiguous set of blocks of the same size. Some
parts have several regions while others have one. A bank is defined as a contiguous set of blocks. The bank may contain blocks of different size. The arrangement of blocks, regions and banks is referred to by this module as the part's geometry.
The cells within the part can be programmed from a logic 1 to a logic 0 and not the other way around. Tochange a cell back to a logic 1, the entire block containing that cell must be erased. When a block is erased all bytes contain the value 0xFF. The number of times a block can be erased is finite. Eventually the block will wear out and will no longer be capable of erasure. As of this writing, the typical flash block can be erased 100,000 or more times.
Library Sources
The source code for the library is included with the Vitis Unified Software Platform installation, as well as being available in the Xilinx Github repository.
Driver Name | Path to Vitis | Path in Github |
|---|---|---|
xilflash | <Vitis Install Directory>/data/embedded/XilinxProcessorIPLib/lib/sw_services/xilflash | https://github.com/Xilinx/embeddedsw/tree/master/lib/sw_services/xilflash |
Note: To view the sources for a particular release, use the rel-version tag in github. For example, for the 2020.1 release, the proper version of the code is: https://github.com/Xilinx/embeddedsw/tree/xilinx-v2020.1/lib/sw_services/xilflash
The library source code is organized into different folders. The table below shows the xilflash library source organization.
Directory | Description |
|---|---|
doc | Provides the API and data structure details |
data | Driver .tcl, .mdd and .yaml file |
examples | Example applications that show how to use the driver features |
src | library source files, make and cmakelists file |
Note: AMD Xilinx embeddedsw build flow has been changed from 2023.2 release to adapt to the new system device tree based flow. For further information, refer to the wiki link Porting embeddedsw components to system device tree (SDT) based flow
The .yaml(in data folder) and CMakeLists.txt(in src folder) files are needed for the System Device Tree based flow. The Driver .tcl and .mdd files are for the older build flow which will be deprecated in future.
Library Implementation
Features support
This xilflash library supports basic operations like read(),write(),erase() etc as below
DeviceControl
Read
Write
Erase
SectorProtection
Known issues and limitations
None
Example Application
Refer to the xillfs library examples directory for various example applications that exercise the different features of the xillfs.
Each application is linked in the table below. The following sections describe the usage and expected output of the various applications.
These example applications can be imported into the Vitis IDE from the Board Support Package settings tab.
Links to Examples
Examples Path: https://github.com/Xilinx/embeddedsw/tree/master/lib/sw_services/xilflash/examples
Test Name | Example Source | Description |
|---|---|---|
xilflash device control example | This example displays the Flash device geometry and properties. The geometry and properties are fetched using Device Control API. | |
xilflash platform flash example | This example tests the Lock and UnLock features of the Flash Device. | |
xilfash read write example | This example tests the Erase, Read and Write features. The Page is erased and data is written to the page. The data is read back and compared with the data written for correctness. | |
xilfash data protection | This example performs data protection tests on flash blocks |
Example Application Usage
xilflash example
read and write test from flash device.
Expected Output
Flash Read/Write Test
Successfully ran Flash Read/Write Test |
Changelog
2024.1
2023.2
https://github.com/Xilinx/embeddedsw/blob/xilinx_v2023.2/doc/ChangeLog#L532
2023.1
None
2022.2
None
2022.1
None
2021.2
None
2021.1
https://github.com/Xilinx/embeddedsw/blob/xilinx_v2021.1/doc/ChangeLog#L329
2020.2
https://github.com/Xilinx/embeddedsw/blob/xilinx-v2020.2/doc/ChangeLog#L1192
2020.1
https://github.com/Xilinx/embeddedsw/blob/xilinx-v2020.1/doc/ChangeLog#L166
2019.2
https://github.com/Xilinx/embeddedsw/blob/xilinx-v2019.2/doc/ChangeLog#L431
2019.1
https://github.com/Xilinx/embeddedsw/blob/xilinx-v2019.1/doc/ChangeLog#L190
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