This page gives an overview of the bare-metal driver support for the System Watchdog Timer.

Introduction

The watchdog timer can be used to prevent system lockup; for example, when software becomes trapped in a deadlock.
In normal operation, the user restarts the watchdog at regular intervals before the timer counts down to zero.
In cases where the timer does reach zero and the watchdog is enabled, one or a combination of the following signals is

generated: a system reset, an interrupt, or an external signal. The watchdog timeout period and the duration of any output signals are programmable.

For more information, please refer Chapter 14: Timers and clocks in Zynqmp Trm which includes links to the official documentation and resource utilization.

Driver Sources

The source code for the driver is included with the Vitis Unified Software Platform installation, as well as being available in the Xilinx Github repository.

Driver Name	Path in vitis	Path in Git Hub
wdtps	<Vitis Install Directory>/data/embedded/XilinxProcessorIPLib/drivers/wdtps	https://github.com/Xilinx/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/wdtps

Note: To view the sources for a particular release, use the rel-version tag in github. For example, for the 2020.1 release, the proper version of the code is: https://github.com/Xilinx/embeddedsw/tree/xilinx-v2020.1/XilinxProcessorIPLib/drivers/wdtps

The driver source code is organized into different folders. The table below shows the wdtps driver source organization.

Directory	Description
src	Driver source files, make and cmakelists file
examples	Example applications that show how to use the driver features
doc	Provides the API and data structure details
data	Driver .tcl , .mdd and .yaml files

Note: AMD Xilinx embeddedsw build flow is changed from 2023.2 release to adapt to the new system device tree based flow. For further information, refer to the wiki page Porting embeddedsw components to system device tree (SDT) based flow - Xilinx Wiki - Confluence (atlassian.net).

The .yaml(in data folder) and CMakeLists.txt(in src folder) files are needed for the System Device Tree based flow. The Driver .tcl and .mdd files are for the older build flow which will be deprecated in the future.

Driver Implementation

For a full list of features supported by this IP, please refer Chapter 14: Timers and clocks in Zynqmp Trm

Features

Controller Features supported

Configurable timeout interval in seconds.
Reset on timeout can be selected.

Driver Supported Features

The Axi watchdog timer Standalone driver supports the below things.
All Controller Features supported.

Known Issues and Limitations

None.

Example Applications

Refer to the driver examples directory for various example applications that exercise the different features of the driver. Each application is linked in the table below. The following sections describe the usage and expected output of the various applications. These example applications can be imported into the Vitis IDE from the Board Support Package settings tab.

Links to Examples

Examples Path:

https://github.com/Xilinx/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/wdtps/examples

Test name	Example source	Description
basic test	xwdtps_selftest_example.c	This example does a minimal test on the System Watchdog Timer device.
Polled	xwdtps_polled_example.c	This example tests the functioning of the System WatchDog Timer driver in the polled mode
Interrupt	xwdtps_intr_example.c	This example tests the functioning of the System WatchDog Timer driver in the Interrupt mode

Example Application Usage

xwdtps_selftest_example.c

WDT SelfTest Example Test
Successfully ran WDT SelfTest Example Test

xwdtps_polled_example.c

WDT Polled Mode Example Test
Successfully ran WDT Polled Mode Example Test

xwdtps_intr_example.c

WDT Interrupt Example Test
Successfully ran WDT Interrupt Example Test

Example Design Architecture

NA

ChangeLog

2024.1

https://github.com/Xilinx/embeddedsw/blob/xlnx_rel_v2024.1/doc/ChangeLog#L404

2023.2

https://github.com/Xilinx/embeddedsw/blob/xlnx_rel_v2023.2/doc/ChangeLog#L615

2023.1

https://github.com/Xilinx/embeddedsw/blob/xlnx_rel_v2023.1/doc/ChangeLog#L3586

2022.2

None

2022.1

https://gitenterprise.xilinx.com/embeddedsw/embeddedsw/blob/xlnx_rel_v2022.1/doc/ChangeLog#L129

2021.2

https://github.com/Xilinx/embeddedsw/blob/xlnx_rel_v2021.2/doc/ChangeLog#L251

2021.1

https://github.com/Xilinx/embeddedsw/blob/xlnx_rel_v2021.1/doc/ChangeLog#L363

2020.2

https://github.com/Xilinx/embeddedsw/blob/release-2020.2/doc/ChangeLog#L248

2020.1

https://github.com/Xilinx/embeddedsw/blob/release-2020.1/doc/ChangeLog#L560

2019.2

https://github.com/Xilinx/embeddedsw/blob/release-2019.2/doc/ChangeLog#L101

2019.1

None

2018.3

https://github.com/Xilinx/embeddedsw/blob/release-2018.3/doc/ChangeLog#L430

Xilinx Wiki

Watchdog Timer standalone driver

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