Watchdog Timer standalone driver

This page gives an overview of the bare-metal driver support for the System Watchdog Timer.

Table of Contents


The watchdog timer can be used to prevent system lockup; for example, when software becomes trapped in a deadlock.
In normal operation, the user restarts the watchdog at regular intervals before the timer counts down to zero.
In cases where the timer does reach zero and the watchdog is enabled, one or a combination of the following signals is
generated: a system reset, an interrupt, or an external signal. The watchdog timeout period and the duration of any output signals are programmable.
For more information, please refer Chapter 14: Timers and clocks in Zynqmp Trm which includes links to the official documentation and resource utilization.

Driver Sources

The source code for the driver is included with the Vitis Unified Software Platform installation, as well as being available in the Xilinx Github repository. 

Driver NamePath in vitisPath in Git Hub

<Vitis Install Directory>/data/embedded/XilinxProcessorIPLib/drivers/wdtps

Note: To view the sources for a particular release, use the rel-version tag in github.  For example, for the 2020.1 release, the proper version of the code is:

The driver source code is organized into different folders. The table below shows the wdtps driver source organization.

srcDriver source files, make and cmakelists file
examplesExample applications that show how to use the driver features
docProvides the API and data structure details
dataDriver .tcl , .mdd and .yaml files

Note: AMD Xilinx embeddedsw build flow is changed from 2023.2 release to adapt to the new system device tree based flow. For further information, refer to the wiki page Porting embeddedsw components to system device tree (SDT) based flow - Xilinx Wiki - Confluence (

The .yaml(in data folder) and CMakeLists.txt(in src folder) files are needed for the System Device Tree based flow. The Driver .tcl and .mdd files are for the older build flow which will be deprecated in the future.

Driver Implementation

For a full list of features supported by this IP, please refer Chapter 14: Timers and clocks in Zynqmp Trm


Controller Features supported

  • Configurable timeout interval in seconds.
  • Reset on timeout can be selected.

Driver Supported Features

The Axi watchdog timer Standalone driver supports the below things.
All Controller Features supported.

Known Issues and Limitations

  • None.

Example Applications

Refer to the driver examples directory for various example applications that exercise the different features of the driver. Each application is linked in the table below. The following sections describe the usage and expected output of the various applications.  These example applications can be imported into the Vitis IDE from the Board Support Package  settings tab.

Links to Examples

Examples Path:

Test nameExample sourceDescription
basic test


This example does a minimal test on the System Watchdog Timer device.


This example tests the functioning of the System WatchDog Timer driver in the polled mode
Interruptxwdtps_intr_example.cThis example tests the functioning of the System WatchDog Timer driver in the Interrupt mode

Example Application Usage


WDT SelfTest Example Test
Successfully ran WDT SelfTest Example Test


WDT Polled Mode Example Test
Successfully ran WDT Polled Mode Example Test


WDT Interrupt Example Test
Successfully ran WDT Interrupt Example Test

Example Design Architecture






  •  None










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