The driver source code is organized into different folders.  The table below shows the ipipsu driver source organization. 

Driver Implementation

For a full list of features supported by this IP, please refer Chapter 73: Octal SPI Controller in Versal TRM

Features

1. Connects as a 32-bit slave on AXI4-Lite interface
2. Supports configurable ports.
3. Supports configurable port sources.
4. Supports configurable filters

Known Issues/Limitations

• If you are using a old application then you can add the xil_macroback.h  header file to the example and compile.

Example Applications

Refer to the driver examples directory for various example applications that exercise the different features of the driver. Each application is linked in the table below. The following sections describe the usage and expected output of the various applications.  These example applications can be imported into the Vitis IDE from the Board Support Package  settings tab. 

Links to Examples

Examples Path:
https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/pmonpsv/examples

Example Application Usage

Pmonpsv self test example

Pmonpsv is used to monitor a sample access

Expected Output

TestAddress: 80000000

WriteRequestValue: 0 WriteRespValue:0
Successfully ran PmonPsv selftest Example

• https://github.com/Xilinx/embeddedsw/blob/xlnx_rel_v2023.2/doc/ChangeLog#L584

2023.1

• None

2022.2

• https://github.com/Xilinx/embeddedsw/blob/xilinx_v2022.2/doc/ChangeLog#L194

2021.1

• None

2020.2

• None

2020.1

• https://github.com/Xilinx/embeddedsw/blob/master/doc/ChangeLog#L2063

2019.2

• https://github.com/Xilinx/embeddedsw/blob/master/doc/ChangeLog#L2583

Related Links

• http://www.wiki.xilinx.com/Baremetal+Drivers+and+Libraries