The purpose of this page is to describe the Linux Zynq QSPI driver for Xilinx QSPI PS
This page provides information about the Zynq QSPI driver which can be found on Xilinx Git as spi-zynq-qspi.c
Zynq has one QSPI hard IP. This is built on top of Cadence SPI with support for QSPI flash devices, linear read and single, parallel and stacked flash configurations.
MTD layer handles all the flash devices used with QSPI. This layer handles flash devices of different makes (Micron/Numonyx, Winbond and Spansion being the most common)
of different sizes from 128Mbit to 1Gbit. The features of all flash devices are not alike and hence handled through different flags indicating the support.
This layer was customized by xilinx to support parallel and stacked configurations. It can be found at drivers/mtd/devices/m25p80.c on Xilinx Git.
- 32-bit AXI interface for Linear Addressing mode transfers
- 32-bit APB interface for I/O mode transfers
- Programmable bus protocol for flash memories from Micron and Spansion
- Legacy SPI and scalable performance: 1x, 2x, 4x, 8x I/O widths
- Flexible I/O
- 16 MB addressing per device (32 MB for two devices)
- Device densities up to 128 Mb for I/O and linear mode. Densities greater than 128 Mb are
- supported in I/O mode.
- I/O mode (flash commands and data)
- Software issues instructions and manages flash operations
- Interrupts for FIFO control
- 63-word RxFIFO, 63-word TxFIFO
- Linear addressing mode (executable read accesses)
- Memory reads and writes are interpreted by the controller
- AXI port buffers up to four read requests
- AXI incrementing and wrapping address functions
Features Supported in Driver
- Master mode
- Single, parallel and dual stacked modes
- Single - One flash device is connected using one slave select, one clock and four data lines.
- Parallel - Two flash devices are connected using common slave select and separate data lines.
- Stacked - Two flash devices are connected using separate slave selects and common data lines.
- Driver uses manual chip select and auto start.
- Programmable clock frequency, polarity and phase
- Interrupt support
- Rx bus width of 1 to 4 - supports quad read.
- Tx bus width of 1 to 4 (Current support in custom MTD layer is for bus width of 1)
- Support for SPI NOR flash devices of sizes from 128Mbit to 1Gbit.
- Various flash related features supported in customized MTD - such as bank selection, lock/unlock in single, parallel and stacked modes
Missing Features and known Issues/Limitations in Driver
- 4-byte commands are not supported on this controller.
- This driver does not use linear read.
- In dual parallel mode, all register read responses (other than status) are obtained only from lower flash device by the controller.
Kernel Configuration OptionsThe following config options need to be enabled
It depends on SPI_MASTER and ARCH_ZYNQ
To use in dual stacked mode, enable
If required, enable MTD block devices support - MTD_BLKDEVS
Refer to spi-zynq-qspi.txt
for complete description.
These are some specific points to be noted about the qspi properties:
- qspi-mode - Currenlty unused. 0 if single, 1 if parallel and 2 if stacked.
- is-dual - Set if parallel. Reset if single or stacked.
Example (single mode):
The following example shows adding a QSPI node to the devicetree in single mode.
This section details the common tests using jffs2 and flashcp.
In order to test different flash sizes and configurations (single, parallel, stacked), the above devicetree should be modified and relevant hardware and design should be used.
QSPI flash testing with flashcp#List the MTD partitions present and select a partitioncat /proc/mtd
#Creating a file to be written to the flash\dd if=/dev/urandom of=./sample.bin bs=1024 count=4096
#Write the file to the partition - this erases the partition, writes the file and verifiesflashcp -v ./sample.bin /dev/mtd0
QSPI flash testing with jffs2
#List the MTD partitions present and select a partitioncat /proc/mtd#Erase a the whole partition with jffs2 markersflash_eraseall -j /dev/mtd3#create a directorymkdir qspi_flash0#Mount the partition to spi_flash0mount -t jffs2 /dev/mtdblock3 /qspi_flash0#Create a file to be written to the flashdd if=/dev/urandom of=./sample.bin bs=1024 count=4096#Write the file to the flashcp ./sample.bin /qspi_flash0/#Check the presence of the file(s) in spi_flash0ls /qspi_flash0#Unmountumount spi_flash0#Mount again - MTD 0 to spi_flash0mount -t jffs2 /dev/mtdblock3 /qspi_flash0#Compare the files - there should be no differencesdiff ./sample.bin /qspi_flash0/sample.bin#Unmountumount qspi_flash0
#The data can be verified again after a power on reset if desired.#/
mtdspeedtest is used to measure the performance of the driver.
Read: 21333 KB/s
Write: 304 KB/s
Read: 42666 KB/s
Write: 465 KB/s
- Fix warnings reported by check patch
- Fix sparse warning in driver
- Fix incorrect spelling in one comment
- Fix coding style violations
- Added support for gpio-cs
- Updated driver as per the new spi-nor framework.
- Upgrade Zynq qspi Driver as oer kernel v5.4
- Check return value of clk_enable api
- Simplify logic for slave select