AXI gpio standalone driver


This page gives an overview of AXI-Gpio driver which is available as part of the Xilinx Vivado and SDK distribution.

Table of Contents 

Introduction



The Xilinx® LogiCORE™ IP AXI General Purpose Input/Output (GPIO) core provides a general purpose input/output interface to the AXI interface.
This 32-bit soft Intellectual Property (IP) core is designed to interface with the AXI4-Lite interface.The AXI GPIO design provides a general purpose
input/output interface to an AXI4-Lite interface. The AXI GPIO can be configured as either a single or a dual-channel device.
The width of each channel is independently configurable.
For more information, please refer AXI_GPIO_Doc the official documentation and resource utilization. 

Driver Sources

The source code for the driver is included with the Vitis Unified Software Platform installation, as well as being available in the Xilinx Github repository. 

Driver namepath in vitisPath in GitHub
rtcpsu

<Vitis Install Directory>/data/embedded/XilinxProcessorIPLib/drivers/gpio

https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/gpio

Note: To view the sources for a particular release, use the rel-version tag in github.  For example, for the 2020.1 release, the proper version of the code is: https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/gpio

The driver source code is organized into different folders. The table below shows the rtcpsu driver source organization.

DirectoryDescription
srcDriver source files
examplesExample applications that show how to use the driver features
docProvides the API and data structure details
dataDriver .tcl and .mdd file

Driver Implementation

For a full list of features supported by this IP, please refer AXI_GPIO_Doc

Features :

Controller Features Supported:

• Supports the AXI4-Lite interface specification
• Supports configurable single or dual GPIO channel(s)
• Supports configurable channel width for GPIO pins from 1 to 32 bits
• Supports dynamic programming of each GPIO bit as input or output
• Supports individual configuration of each channel
• Supports independent reset values for each bit of all registers
• Supports optional interrupt request generation

Driver Supported Features:

The axi-gpio Standalone driver support the below things.
All Controller Features supported

Known issues and Limitations

  • None.

Example Applications

Refer to the driver examples directory for various example applications that exercise the different features of the driver. Each application is linked in the table below. The following sections describe the usage and expected output of the various applications.  These example applications can be imported into the Vitis IDE from the Board Support Package  settings tab.

Links to Examples

Examples Path:

https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/gpio/examples

Test NameExample sourceDescription

xgpio_example.c

This example provides the usage of blinking leds on hardware.

xgpio_intr_tapp_example.cThis example shows the usage of the driver in interrupt mode. It uses the interrupt capability of the GPIO to detect button events and set the output LED based on the input.

xgpio_low_level_example.cThis example provides the usage of  low level operations.

xgpio_tapp_example.cThis example provides the usage of API's for reading/writing to the individual pins..

Example Application Usage

GPIO examples

We can observed output on hardware board

 ex: blinking leds in polled and interrupt mode

Example Design Architecture

   NA

ChangeLog

2021.2

None