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AXI-I2C standalone driver

AXI-I2C standalone driver

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This page gives an overview of the bare-metal driver support for the AXI I2C controller.

Table of Contents

Introduction


The LogiCORE™ IP AXI IIC Bus Interface connects to the AMBA® AXI specification and provides a low-speed, two-wire,
serial bus interface to a large number of popular devices. This product specification defines the architecture,
hardware (signal) interface, software (register) interface, and parameterization options for the AXI IIC Bus Interface module.

Driver Sources

The source code for the driver is included with the Vitis Unified Software Platform installation, as well as being available in the Xilinx Github repository. 

Driver NamePath in VitisPath in Github
iic

<Vitis Install Directory>/data/embedded/XilinxProcessorIPLib/drivers/iic

https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/iic

Note: To view the sources for a particular release, use the rel-version tag in github.  For example, for the 2020.1 release, the proper version of the code is: https://github.com/Xilinx/embeddedsw/tree/xilinx-v2020.1/XilinxProcessorIPLib/drivers/iic

The driver source code is organized into different folders.  The table below shows the ospipsv driver source organization. 

Directory
Description

doc

Provides the API and data structure details

data

Driver .tcl, .yaml and .mdd file

examples

Example applications that show how to use the driver features

src

Driver source files, make and cmakelists file

Note: AMD Xilinx embeddedsw build flow has been changed from 2023.2 release to adapt to the new system device tree based flow. For further information, refer to the wiki link Porting embeddedsw components to system device tree (SDT) based flow
The .yaml(in data folder) and CMakeLists.txt(in src folder) files are needed for the System Device Tree based flow. The Driver .tcl and .mdd files are for the older build flow which will be deprecated in future.

Driver Implementation

For a full list of features supported by this IP, please refer https://www.xilinx.com/support/documentation/ip_documentation/axi_iic/v2_0/pg090-axi-iic.pdf

Features

• Register access through AXI4-Lite interface
• Master or slave operation
• Multi-master operation
• Software selectable acknowledge bit
• Arbitration lost interrupt with automatic mode switching from master to slave
• Calling address identification interrupt with automatic mode switching from master to slave
• START and STOP signal generation and detection
• Repeated START signal generation
• Acknowledge bit generation and detection
• Bus busy detection
• Fast-Mode Plus 1 MHz, Fast Mode 400 kHz, or Standard Mode 100 kHz operation
• 7-bit or 10-bit addressing
• General call enable or disable
• Transmit and receive FIFOs – 16 bytes deep
• Throttling
• General purpose output, 1-bit to 8 bits wide
• Dynamic Start and Stop generation

Known issues and Limitations

  • None.

Example Applications

Refer to the driver examples directory for various example applications that exercise the different features of the driver. Each application is linked in the table below. The following sections describe the usage and expected output of the various applications.  These example applications can be imported into the Vitis IDE from the Board Support Package  settings tab. 


Links to Examples

Examples path: https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/iic/examples

Test nameExample sourceDescription
AXI IIC eeprom example in dynamic modexiic_dynamic_eeprom_example.cThis example does read/writes using AXI IIC dynamic mode
AXI IIC eeprom example in standard modexiic_eeprom_example.cThis example does read/writes using AXI IIC standard mode
AXI IIC repeated start examplexiic_repeated_start_example.c

This example does read/writes with repeated start.

AXI IIC low_level_dynamic_eeprom_examplxiic_low_level_dynamic_eeprom_example.cThis example does polled read/writes using AXI IIC dynamic mode
AXI IIC
low_level_eeprom_example
xiic_low_level_eeprom_example.cThis example does polled read/writes using AXI IIC standard mode
AXI IIC 
low_level_tempsensor_example
xiic_low_level_tempsensor_example.c
This example only performs read operations (receive) from the
iic temperature sensor of the platform.
AXI IIC 
multi_master_example
xiic_multi_master_example.c
This example writes/reads from the lower 256 bytes of
the IIC EEPROMS.
AXI IIC 
selftest_example
xiic_selftest_example.c
This example performs the basic selftest using the driver.
AXI IIC 
slave_example
xiic_slave_example.c
This example consists of a Interrupt mode design which shows the usage of
the Xilinx iic device and XIic driver to exercise the slave functionality
of the iic device.
AXI IIC 
tempsensor_example
xiic_tempsensor_example.c
This example only performs read operations(receive) from the iic temperature
sensor of the platform.
AXI IIC 
tenbitaddr_example
xiic_tenbitaddr_example.c
This example consists of a Interrupt mode design which shows the usage of the Xilinx
iic device and XIic driver to exercise the 10-bit Address functionality of the
iic device.

Example Application Usage

AXI IIC eeprom example in dynamic mode

This example does read/writes using AXI IIC dynamic mode
Expected Output
Successfully ran IIC dynamic eeprom Example
AXI IIC eeprom example in standard mode
This example does read/writes using AXI IIC standard mode
Expected Output
Successfully ran IIC eeprom Example
AXI IIC repeated start example
This example does read/writes with repeated start.
Expected Output
Successfully ran IIC repeated start Example

ChangeLog

2024.2

https://github.com/Xilinx/embeddedsw/blob/xlnx_rel_v2024.2/doc/ChangeLog#L572

2024.1

https://github.com/Xilinx/embeddedsw/blob/xlnx_rel_v2024.1/doc/ChangeLog#L453

2023.2

https://github.com/Xilinx/embeddedsw/blob/xlnx_rel_v2023.2/doc/ChangeLog#L39

2023.1

https://github.com/Xilinx/embeddedsw/blob/xilinx_v2023.1/doc/ChangeLog#L2108

2022.2

https://github.com/Xilinx/embeddedsw/blob/xilinx_v2022.2/doc/ChangeLog#L1010

2022.1

https://github.com/Xilinx/embeddedsw/blob/xilinx_v2022.1/doc/ChangeLog#L37

2021.2

https://github.com/Xilinx/embeddedsw/blob/xilinx_v2022.1/doc/ChangeLog#L37

2021.2

None

2021.1

https://github.com/Xilinx/embeddedsw/blob/xilinx_v2021.1/doc/ChangeLog#L441

2020.2

https://github.com/Xilinx/embeddedsw/blob/xilinx-v2020.2/doc/ChangeLog#L618

2020.1

None

2019.2

None

2019.1

None

2018.3

None

2018.2

None

2018.1

None

2017.4

None

2017.3

None

2017.2

None

2017.1

None

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