This page gives an overview of the bare-metal driver support for the Synopsys i3cpsx host controller.

Table of Contents

Introduction

The I3C controller supports the v1.0 standard and includes dynamic address assignment, data transfer to legacy I2C destinations, broadcast, and CCC transfers.

The controller can also operate in secondary configuration mode.

Driver Sources

The source code for the driver is included with the Vitis Unified Software Platform installation, as well as being available in the Xilinx GitHub repository. 

Note: to view the sources for a particular release, use the rel-version tag in github.  For example, for the 2023.1 release, the proper version of the code is: https://github.com/Xilinx/embeddedsw/tree/xlnx_rel_v2023.1/XilinxProcessorIPLib/drivers/i3cpsx

The driver source code is organized into different folders.  The table below shows the i3cpsx driver source organization. 

Note: the AMD Xilinx embeddedsw build flow has been changed from the 2023.2 release to adapt to the new system device tree based flow. For further information, refer to Porting embeddedsw components to system device tree (SDT) based flow

The .yaml (in the data folder) and CMakeLists.txt (in the src folder) files are needed for the System Device Tree based flow. The Driver .tcl and .mdd files are for the older build flow which will be deprecated in future.

Driver Implementation

For a full list of features supported by the IP, please refer to the I3C Controller section in the Versal Net TRM.

Features

• Supports dynamic Address assignment

• Supports SDR mode up to 12.5MHZ

• Supports master mode polled and interrupt transfers

• Supports slave mode polled transfer

• Supports CCC transfers

• Supports Address assignment CCC transfer

• Supports threshold configuration for Tx, Rx and Response FIFOs

Known issues and Limitations

• IBI and hot join not supported

• Slave mode interrupt transfer not supported

Example Applications

Refer to the driver examples directory for various example applications that exercise the different features of the driver. Each application is linked in the table below. The following sections describe the usage of the various applications.  These example applications can be imported into the Vitis IDE from the Board Support Package settings tab. 

Links to Examples

Examples Path:
https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/i3cpsx/examples

Example Application Usage

We can observed output on the serial log once the example has been executed on the board.

Example Design Architecture

NA

Performance

NA

Changelog

2025.1

https://github.com/Xilinx/embeddedsw/blob/xlnx_rel_v2025.1/doc/ChangeLog#L161

2024.2

https://github.com/Xilinx/embeddedsw/blob/xlnx_rel_v2024.2/doc/ChangeLog#L236

2024.1

https://github.com/Xilinx/embeddedsw/blob/xlnx_rel_v2024.1/doc/ChangeLog#L432

2023.2

https://github.com/Xilinx/embeddedsw/blob/xlnx_rel_v2023.2/doc/ChangeLog#L570

2023.1

https://github.com/Xilinx/embeddedsw/blob/xlnx_rel_v2023.1/doc/ChangeLog#L90

Related Links

• http://www.wiki.xilinx.com/Baremetal+Drivers+and+Libraries