AXI I3C Standalone Driver

AXI I3C Standalone Driver

This page gives an overview of the bare-metal driver support for the AMD AXI I3C host controller.

Table of Contents

Introduction

The AXI I3C controller supports the v1.0 standard and includes dynamic address assignment broadcast, CCC transfers, data transfer in master mode for both polled and interrupt.

For more information, please refer to (PG439) AXI I3C Bus Interface V1.0 

Driver Sources

The source code for the driver is included with the Vitis Unified Software Platform installation, and is also available in the Xilinx GitHub repository. 

Driver Name

Path to Vitis

Path in Github

Driver Name

Path to Vitis

Path in Github

I3C

<Vitis Install Directory>/data/embedded/XilinxProcessorIPLib/drivers/I3c

embeddedsw/XilinxProcessorIPLib/drivers/i3c at master · Xilinx/embeddedsw

The driver source code is organized into different folders.  The table below shows the I3C driver source organization. 

Directory

Description

Directory

Description

doc

Provides the API and data structure details

data

Driver .tcl, .mdd and .yaml file

examples

Example applications that show how to use the driver features

src

Driver source files, make and cmakelists file

Note: the AMD embeddedsw build flow has been changed from the 2023.2 release on to adapt to the new system device tree based flow. For further information, refer to the wiki link Porting embeddedsw components to system device tree (SDT) based flow

The .yaml (in the data folder) and CMakeLists.txt (in the src folder) files are needed for the System Device Tree based flow. The Driver .tcl and .mdd files are for the older build flow which will be deprecated in the future.

 

Driver Implementation

For a full list of features supported by this IP, please see (PG439) AXI I3C Bus Interface V1.0  

 

Features

  • Supports dynamic Address assignment

  • supports clock configuration

  • Supports SDR mode up to 12 MHZ

  • Supports master mode polled and interrupt transfers

  • Supports CCC transfers

  • Supports Address assignment CCC transfer

  • Supports IBI and hot join

Known issues and Limitations

  • Slave mode not supported

Example Applications

Refer to the driver examples directory for various example applications that exercise the different features of the driver. Each application is linked in the table below. The following sections describe the usage of the various applications.  These example applications can be imported into the Vitis IDE from the Board Support Package settings tab. 

Links to Examples

Examples Path:
https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/i3c/examples

Test Name

Example Source

Description

Test Name

Example Source

Description

I3CPS dynamic example

xi3c_daa_example.c

Assigns the dynamic addresses to slave addresses then sends and receives data from the slave.

I3CPS Interrupt example

xi3c_intr_example.c

Sends and also receives data from and to the slave using in interrupt-driven mode.

I3CPS Polled example

xi3c_polled_example.c

Sets the slave static address as their dynamic address then sends and receives data from the slave.

Example Application Usage

We can observed output on the serial log once the example has been executed on the board.

Example Design Architecture

NA

Performance

NA

Changelog

2025.1

https://github.com/Xilinx/embeddedsw/blob/xlnx_rel_v2025.1/doc/ChangeLog#L155

2024.2

https://github.com/Xilinx/embeddedsw/blob/xlnx_rel_v2024.2/doc/ChangeLog#L226

2024.1

https://github.com/Xilinx/embeddedsw/blob/xlnx_rel_v2024.1/doc/ChangeLog#L442

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