TTC Standalone Driver
This page gives an overview of ttcps driver which is available as part of the Xilinx Vivado and SDK distribution.
Table of Contents
Introduction
This page gives an overview of ttcps driver which is available as part of the Xilinx Vivado and SDK distribution.
Driver Sources
The source code for the driver is included with the Vitis Unified Software Platform installation, as well as being available in the Xilinx Github repository.
Driver Name | Path in Vitis | Path in Github |
---|---|---|
ttcps | <Vitis Install Directory>/data/embedded/XilinxProcessorIPLib/drivers/ospipsv | https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/ttcps |
Note: To view the sources for a particular release, use the rel-version tag in github. For example, for the 2020.1 release, the proper version of the code is: https://github.com/Xilinx/embeddedsw/tree/release-2020.1/XilinxProcessorIPLib/drivers/ttcps
The driver source code is organized into different folders. The table below shows the ttcps driver source organization.
Directory | Description |
---|---|
doc | Provides the API and data structure details |
data | Driver .tcl , .mdd and .yaml files |
examples | Example applications that show how to use the driver features |
src | Driver source files, make and cmakelists file |
Note: The .yaml(in data folder) and CMakeLists.txt(in src folder) files would be used in System Device Tree based flow.
Driver Implementation
For a full list of features supported by this IP, please refer Zynq/ZynqMP/Versal TRM.
Features Supported
- Three independent 32-bit timer/counters for ZynqMP/Versal and 16-bit timer/counter for Zynq
- Clock can be selected from:
- Internal PS bus clock (CPU_1x)
- Internal clock (from PL)
- External clock (from MIO)
- 16-bit pre-scalar for clock
- Three interrupts, one for each counter
- Support both increment and decrement counting
- Interrupt on overflow, at regular interval, or counter matching programmable values
- Ability to generate waveform output (e.g. PWM) through the MIO
- Support waveform output to the PL
Known issues and Limitations
- None
Example Applications
Refer to the driver examples directory for various example applications that exercise the different features of the driver. Each application is linked in the table below. The following sections describe the usage and expected output of the various applications. These example applications can be imported into the Vitis IDE from the Board Support Package settings tab.
Links to Examples
Examples Path:
https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/ttcps
Test Name | Example Source | Description |
---|---|---|
TTC interrupt examples | These examples demonstrates TTC interval mode and match mode functionality with interrupts. | |
TTC low level example | This examples uses TTC timer/counter to generate square wave output on waveform output pin. It works on polling mode. |
Example Application Usage
TTC interrupt example
This example uses 2 timer counters, one in interval mode and other in match mode. It uses interrupt mode.
Expected output
TTC Interrupt Example Test Successfully ran TTC Interrupt Example Test
TTC rtc example:
This example uses one timer/counter to make a real time clock. The number of seconds elapsed are displayed on
the console till 121 seconds are elapsed.
Expected output
Starting Timer RTC Example Successfully ran ttcps rtc Example
TTC low level example
This example uses triple timer counter in polled match mode to generate square wave output on waveform out pin.
Expected output
TTC Lowlevel Interrupt Example Test Successfully ran Lowlevel TTC Interrupt Example Test
TTC tapp example
This example uses triple timer counter to generate interrupt and update a flag which is checked in the interrupt example to confirm whether the interrupt is generated or not.
Starting Timer interrupt Example Successfully ran ttcps tapp Example
Note:
- Driver examples are not ported to system device tree flow
Changelog
2024.1
2023.2
2023.1
2022.2
2022.1
2021.2
2021.1
2020.2
2020.1
2019.2
2019.1
2018.3
2017.4
2017.3
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