Gpio-PS standalone driver

Introduction

This page gives an overview of gpiops driver which is available as part of the Xilinx Vivado and SDK distribution.
The Xilinx General purpose I/O is a collection of input/output pins available to the software application running on Processing system.
For more information, please refer Chapter 27: Real Time Clock in Zynqmp Trm which includes links to the official documentation and resource utilization. 
Driver Sources

The source code for the driver is included with the Vitis Unified Software Platform installation, as well as being available in the Xilinx Github repository. 

Driver nameDriver path in VitisPath in Git Hub
gpiops

<Vitis Install Directory>/data/embedded/XilinxProcessorIPLib/drivers/gpiops

https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/gpiops

Note: To view the sources for a particular release, use the rel-version tag in github.  For example, for the 2020.1 release, the proper version of the code is: https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/gpiops

The driver source code is organized into different folders. The table below shows the rtcpsu driver source organization.
DirectoryDescription
srcDriver source files
examplesExample applications that show how to use the driver features
docProvides the API and data structure details
dataDriver .tcl and .mdd file

Driver Implementation

For a full list of features supported by this IP, please refer Chapter 27: Real Time Clock in Zynqmp Trm

Features

Controller Features

ZYNQMP

  • 78 GPIO signals for device pins.
    • Routed through the MIO multiplexer.
    • Outputs are 3-state capable.
  • 288 GPIO signals between the PS and PL through the EMIO interface.
    • 96 inputs.
    • 192 outputs (96 true outputs and 96 output enables).
  • I/O interface is organized into 6 banks(3 MIO and 3 EMIO)
  • Interface control registers are grouped by bank {0:5}.
  • Input values are read using the six DATA_RO_x registers.
  • The function of each GPIO can be dynamically programmed on an individual or group basis.
  • Enable, bit or bank data write, output enable and direction controls.
  • Programmable interrupts on individual GPIO basis.
    • Status read of raw and masked interrupt.
    • Selectable sensitivity: Level-sensitive (High or Low) or edge-sensitive (positive, negative, or both).

ZYNQ

  • 54 GPIO signals for device pins
    • Routed through the MIO multiplexer.
    • Outputs are 3-state capable.
  • 192 GPIO signals between the PS and PL via the EMIO interface.
    • 64 Inputs
    • 128 Outputs(64 true outputs and 64 output enables).
  • The function of each GPIO can be dynamically programmed on an individual or group basis.
  • Enable, bit or bank data write, output enable and direction controls.
  • Programmable interrupts on individual GPIO basis.
    • Status read of raw and masked interrupt.
    • Selectable sensitivity: Level-sensitive (High or Low) or edge-sensitive (positive, negative, or both).

Driver Features

The Gpiops Standalone driver support the below things.

  • All controller features supported.

Known Issues and Limitations

  • None


Example Applications

Refer to the driver examples directory for various example applications that exercise the different features of the driver. Each application is linked in the table below. The following sections describe the usage and expected output of the various applications.  These example applications can be imported into the Vitis IDE from the Board Support Package  settings tab.

Links to Examples

Examples Path:

https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/gpiops/examples

Test NameExample source

Description

Polledxgpiops_polled_example.cThis example provides the usage of API's for reading/writing to the individual pins.
Interrupt

xgpiops_intr_example.c

This example shows the usage of the driver in interrupt mode. It uses the interrupt capability of the GPIO to detect push button events and set the output LED based on the input.

Example Application Usage

GpioPs examples

Expected Output


xgpiops_polled_example.c
OUTPUT:
GPIO Polled Mode Example Test 
Data read from GPIO Input is  0x0 
Successfully ran GPIO Polled Mode Example Test

xgpiops_intr_example.c
OUTPUT:
GPIO Interrupt Example Test 

Push Switch button to exit
Successfully ran GPIO Interrupt Example Test


Change Log

2021.2

None

2021.1

https://github.com/Xilinx/embeddedsw/blob/xlnx_rel_v2021.1/doc/ChangeLog#L433

2020.2

https://github.com/Xilinx/embeddedsw/blob/release-2020.2/doc/ChangeLog#L201

2020.1

https://github.com/Xilinx/embeddedsw/blob/release-2020.1/doc/ChangeLog#L47

2019.2

https://github.com/Xilinx/embeddedsw/blob/release-2019.2/doc/ChangeLog#L23

2019.1

https://github.com/Xilinx/embeddedsw/blob/release-2019.1/doc/ChangeLog#L367

2018.3

https://github.com/Xilinx/embeddedsw/blob/release-2018.3/doc/ChangeLog#L133

Related Links