This page gives an overview of the bare-metal driver support for the Xilinx® LogiCORE™ IP Arasan SD 3.0 host controller.

Introduction

The two SD controllers have the same feature set and can be operated independently. The controller communicates with SDIO devices, SD memory cards, and eMMC cards with up to
eight data lines. In SD mode, data transfers in 1-bit and 4-bit modes. In eMMC mode, data transfers in 1-bit, 4-bit, and 8-bit modes. The interface can be routed through the MIO
multiplexer to the MIO pins or through the EMIO to the SelectIO pin in the PL. The controller is accessed by the APU and RPU via the AXI bus. The controller also includes
a DMA unit with an internal FIFO to meet throughput requirements.

For more information, please refer Chapter 72: SD/eMMC Controllers in Versal TRM (Versal platform) and Chapter 26: SD/SDIO/eMMC Controller in ZynqMP TRM, which includes links to the official documentation and resource utilization.

Driver Sources

The source code for the driver is included with the Vitis Unified Software Platform installation, as well as being available in the Xilinx Github repository.

Driver Name	Path to Vitis	Path in Github
sdps	<Vitis Install Directory>/data/embedded/XilinxProcessorIPLib/drivers/sdps	https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/sdps/

Note: To view the sources for a particular release, use the rel-version tag in github. For example, for the 2020.1 release, the proper version of the code is: https://github.com/Xilinx/embeddedsw/tree/xilinx-v2020.1/XilinxProcessorIPLib/drivers/sdps

The driver source code is organized into different folders. The table below shows the sdps driver source organization.

Directory	Description
doc	Provides the API and data structure details
data	Driver .tcl, .mdd and .yaml file
examples	Example applications that show how to use the driver features
src	Driver source files, make and cmakelists file

Note: AMD Xilinx embeddedsw build flow has been changed from 2023.2 release to adapt to the new system device tree based flow. For further information, refer to the wiki link Porting embeddedsw components to system device tree (SDT) based flow

The .yaml(in data folder) and CMakeLists.txt(in src folder) files are needed for the System Device Tree based flow. The Driver .tcl and .mdd files are for the older build flow which will be deprecated in future.

Driver Implementation

For a full list of features supported by this IP, please refer Chapter 72: SD/eMMC Controllers in Versal TRM (Versal platform) and Chapter 26: SD/SDIO/eMMC Controller in ZynqMP TRM

Features

SD Card interface
• Host clock rate variable between 0 and 208 MHz
• Up to 832Mbits per second data rate using 4 parallel data lines (SDR104 mode)
• Transfers the data in 1 bit and 4 bit SD modes
• Transfers the data in SDR104, SDR50, DDR50, SDR25, SDR12 modes.

• Polled mode data transfers.

eMMC card interface
• Transfers the data in 1 bit, 4 bit and 8 bit modes.

• Supports HS200, DDR52 modes.

• Polled mode data transfers.

Known issues and Limitations

Driver supports only polled mode.

Example Applications

Refer to the driver examples directory for various example applications that exercise the different features of the driver. Each application is linked in the table below. The following sections describe the usage and expected output of the various applications. These example applications can be imported into the Vitis IDE from the Board Support Package settings tab.

Links to Examples

Examples Path:
https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/sdps/examples

Test Name	Example Source	Description
Read and Write example without file system	xsdps_raw_example.c	This examples does basic raw read and write test from SD/eMMC device in Polled mode.
Read and Write example with file system (using XILFFS library)	xilffs_polled_example.c	This examples does basic file system read and write test from SD/eMMC device in Polled mode.

Example Application Usage

SDPS Read and Write example without file system

This examples does basic raw read and write test from SD/eMMC device in Polled mode.

Expected Output

SD Raw Read/ Write Test
Successfully ran SD Raw Read/ Write Test

Read and Write example with file system (using XILFFS library)

This examples does basic file system read and write test from SD/eMMC device in Polled mode.

Expected Output

SD Polled File System Example Test
Successfully ran SD Polled File System Example Test

Example Design Architecture

NA

Performance

SD card : Sandisk Ultra 16GB SDHC card

Zynq:

High speed

20.54 MB/sec

ZynqMP:

High Speed	19.4 MB/Sec
SDR	SDR104: 76.50MB/sec
DDR	DDR50: 40.68MB/sec

Note : The SD performance may be impacted by the SD card cluster size. Formatting the card with larger cluster size will be able to produce higher performance. Above performance numbers are achieved by formatting the SD card with highest possible cluster size.