I2C-PS standalone driver

This page gives an overview of the bare-metal driver support for the PS I2C controller.

Table of Contents

Introduction

The I2C controllers can function as a master or a slave in a multi-master design. They can
operate over a clock frequency range up to 400 kb/s.


Source path for the driver:
https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/iicps
Driver source code is organized into different folders. Below diagram shows the iicps driver source organization

iicps
|
-- Doc - Provides the API and data structure details
|
- Examples - Reference application to show how to use the driver APIs and calling sequence
|
- Source - Driver source files

.

Driver Sources

The source code for the driver is included with the Vitis Unified Software Platform installation, as well as being available in the Xilinx Github repository. 

Driver Name

Path in Vitis

Path in Github

iicps

<Vitis Install Directory>/data/embedded/XilinxProcessorIPLib/drivers/iicps

https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/iicps

Note: To view the sources for a particular release, use the rel-version tag in github.  For example, for the 2020.1 release, the proper version of the code is: https://github.com/Xilinx/embeddedsw/tree/xilinx-v2020.1/XilinxProcessorIPLib/drivers/iicps

The driver source code is organized into different folders.  The table below shows the ospipsv driver source organization. 

Directory
Description

doc

Provides the API and data structure details

data

Driver .tcl, .yaml and .mdd file

examples

Example applications that show how to use the driver features

src

Driver source files, make and cmakelists file

Note: AMD Xilinx embeddedsw build flow has been changed from 2023.2 release to adapt to the new system device tree based flow. For further information, refer to the wiki link Porting embeddedsw components to system device tree (SDT) based flow
The .yaml(in data folder) and CMakeLists.txt(in src folder) files are needed for the System Device Tree based flow. The Driver .tcl and .mdd files are for the older build flow which will be deprecated in future.

Driver Implementation

For a full list of features supported by this IP, please refer Chapter 69: I2C Controller in Versal TRM

Features

I2C bus specification version 2
Supports 16-byte FIFO
Programmable normal and fast bus data rates

Master mode
Write transfer
Read transfer
Extended address support
Support HOLD for slow processor service
Supports TO interrupt flag to avoid stall condition

Slave monitor mode

Slave mode
Slave transmitter
Slave receiver
Extended address support (10-bit address)
Fully programmable slave response address
Supports HOLD to prevent overflow condition
Supports TO interrupt flag to avoid stall condition

Software can poll for status or function as interrupt-driven device
Programmable interrupt generation


Known issues and Limitations
Multi-master configuration works only if all the participating masters are operating at the same frequency.

Example Applications

Refer to the driver examples directory for various example applications that exercise the different features of the driver. Each application is linked in the table below. The following sections describe the usage and expected output of the various applications.  These example applications can be imported into the Vitis IDE from the Board Support Package  settings tab. 


Links to Examples

Examples path: 

https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/iicps/examples

Test nameExample sourceDescription
IICPS eeprom interrupt mode examplexiicps_eeprom_intr_example.cThis example does eeprom read/writes using interrupts.
IICPS eeprom polled mode examplexiicps_eeprom_polled_example.cThis example does eeprom read/writes using polling.
IICPS slave monitor mode examplexiicps_slave_monitor_example.cThis example does slave monitoring of an I2C slave device.

Example Application Usage

IICPS eeprom interrupt mode example

This example does eeprom read/writes using interrupts.

Expected Output

IIC EEPROM Interrupt Example Test
Page size 16
Successfully ran IIC EEPROM Interrupt Example Test

IICPS eeprom polled mode example

This example does eeprom read/writes using polling.

Expected Output

IIC EEPROM Polled Mode Example Test
Page size 16
Successfully ran IIC EEPROM Polled Mode Example Test

IICPS slave monitor mode example

This example does slave monitoring of an I2C slave device.

Expected Output

IIC Slave Monitor Example Test 
Successfully ran IIC Slave Monitor Example Test

Example Design Architecture

NA

ChangeLog

2023.2

https://github.com/Xilinx/embeddedsw/blob/xlnx_rel_v2023.2/doc/ChangeLog#L44

2023.1

https://github.com/Xilinx/embeddedsw/blob/xilinx_v2023.1/doc/ChangeLog#L221

2022.2

https://github.com/Xilinx/embeddedsw/blob/xilinx_v2022.2/doc/ChangeLog#L103

2022.1

https://github.com/Xilinx/embeddedsw/blob/xilinx_v2022.1/doc/ChangeLog#L34

2021.2

https://github.com/Xilinx/embeddedsw/blob/xilinx_v2021.2/doc/ChangeLog#L214

2021.1

https://github.com/Xilinx/embeddedsw/blob/xilinx_v2021.1/doc/ChangeLog#L445

2020.2

https://github.com/Xilinx/embeddedsw/blob/xilinx-v2020.2/doc/ChangeLog#L207

2020.1

https://github.com/Xilinx/embeddedsw/blob/xilinx-v2020.1/doc/ChangeLog#L62

2019.2

None

2019.1

https://github.com/Xilinx/embeddedsw/blob/xilinx-v2019.1/doc/ChangeLog#L95

2018.3

None

2018.2

https://github.com/Xilinx/embeddedsw/blob/xilinx-v2018.2/doc/ChangeLog#L44

2018.1

None

2017.4

None

2017.3

None

2017.2

None

2017.1

https://github.com/Xilinx/embeddedsw/blob/xilinx-v2017.1/doc/ChangeLog#L254

2016.4

None

2016.3

https://github.com/Xilinx/embeddedsw/blob/xilinx-v2016.3/doc/ChangeLog#L122

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