Qspipsu Standalone driver
This page gives an overview of Qspipsu Standalone driver.
Table of Contents
Introduction
The quad SPI (QSPI) controller can access one or two flash devices using several different methods.• SPI accesses
• Programmed I/O (PIO) protocol
• DMA indirect read using AXI master interface
Driver Sources
The source code for the driver is included with the Vitis Unified Software Platform installation, as well as being available in the Xilinx Github repository.
Driver Name | Path in Vitis | Path in Github |
---|---|---|
qspipsu | <Vitis Install Directory>/data/embedded/XilinxProcessorIPLib/drivers/qspipsu | https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/qspipsu |
Note: To view the sources for a particular release, use the rel-version tag in github. For example, for the 2020.1 release, the proper version of the code is: https://github.com/Xilinx/embeddedsw/tree/xilinx-v2020.1/XilinxProcessorIPLib/drivers/qspipsu
The driver source code is organized into different folders. The table below shows the qspipsu driver source organization.
Directory | Description |
---|---|
doc | Provides the API and data structure details |
data | Driver .tcl , .mdd and .yaml files |
examples | Example applications that show how to use the driver features |
src | Driver source files, make and cmakelists file |
Note: AMD Xilinx embeddedsw build flow is changed from 2023.2 release to adapt to the new system device tree based flow. For further information, refer to the wiki page Porting embeddedsw components to system device tree (SDT) based flow - Xilinx Wiki - Confluence (atlassian.net).
The .yaml(in data folder) and CMakeLists.txt(in src folder) files are needed for the System Device Tree based flow. The Driver .tcl and .mdd files are for the older build flow which will be deprecated in the future.
Driver Implementation
For a full list of features supported by this IP, please refer Chapter 71: Quad SPI Controller in Versal TRM
Features
- DMA access (aligned address only)
- IO access
- Control of two chip selects/bus
- Configurable clock
- Configurable bus width
- Byte Mirror/Stripe operations
- Interrupts – will be chosen and enabled internally
- SPI NAND flash devices
Known Issues and Limitations
Important AR links
- xqspipsu flash example fails in QSPI bootmodes https://xilinx.sharepoint.com/sites/XKB/SitePages/Articleviewer.aspx?ArticleNumber=76642
Supported Flash vendors
- Micron
- ISSI
- Spansion
- Macronix
Example Applications
Refer to the driver examples directory for various example applications that exercise the different features of the driver. Each application is linked in the table below. The following sections describe the usage and expected output of the various applications. These example applications can be imported into the Vitis IDE from the Board Support Package settings tab.
Links to Examples
Examples Path:
https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/qspipsu/examples
Test Name | Example source | Description |
---|---|---|
Generic QSPI Interrupt Mode Example | This examples does basic read and write test from the SPI-NOR flash device in Interrupt mode. | |
Generic QSPI Polled Mode Example | This examples does basic read and write test from the SPI-NOR flash device in Polled mode. | |
Generic QSPI Non-blocking read example | This examples does read in non blocking polled mode from the SPI-NOR flash device. | |
Generic QSPI NAND Interrupt Mode Example | This examples does basic read and write test from the SPI-NAND flash device in Interrupt mode. | |
Generic QSPI NAND Polled Mode Example | This examples does basic read and write test from the SPI-NAND flash device in Polled mode. | |
Generic QSPI 64 Bit DMA Mode Example | This example does read in polled mode with 64bit DMA from SPI-NOR flash device. | |
Generic QSPI Write Protection Example | This example tests the write protection feature of the SPI-NOR flash device | |
Generic QSPI Polldata Mode Example | This example illustrates, the use of polldata feature of the controller | |
Linear QSPI Example | This example writes in GQSPI mode & reads in linear mode. |
Example Application Usage
Generic QSPI Interrupt Mode Example
This examples does basic read and write test from the flash device in Interrupt mode.
Expected Output
QSPIPSU Generic Flash Interrupt Example Test Cfg Init done, Baseaddress: 0xF1030100 FlashID=0x20 0xBB 0x21 Flash connection mode : 2 where 0 - Single; 1 - Stacked; 2 - Parallel FCTIndex: 10 ReadCmd: 0x6B, WriteCmd: 0x2,StatusCmd: 0x70, FSRFlag: 1 Successfully ran QSPIPSU Generic Interrupt Example |
---|
Generic QSPI Polled Mode Example
This examples does basic read and write test from the flash device in Polled mode.
Expected Output
QSPIPSU Generic Flash Polled Example Test FlashID=0x20 0xBB 0x21 Flash connection mode : 2 where 0 - Single; 1 - Stacked; 2 - Parallel FCTIndex: 10 ReadCmd: 0x6B, WriteCmd: 0x2, StatusCmd: 0x70, FSRFlag: 1 Successfully ran QSPIPSU Generic Flash Polled Example |
---|
Generic QSPI 64 Bit DMA Mode Example
This example does read in polled mode with 64bit DMA.
Expected Output
QSPIPSU Generic Flash Polled Example 64bit dma for r5Test FlashID=0x20 0xBB 0x21 Flash connection mode : 2 where 0 - Single; 1 - Stacked; 2 - Parallel FCTIndex: 10 ReadCmd: 0x6B, WriteCmd: 0x2, StatusCmd: 0x70,FSRFlag: 1 Successfully ran Generic Flash Polled 64 bit dma r5 Example |
---|
Generic QSPI Polldata Mode Example
This example illustrates, the use of polldata feature of the controller
Expected Output
QSPIPSU Flash PollData and PollTimeout Example Test Cfg Init done, Baseaddress: 0xF1030100 FlashID=0x20 0xBB 0x21 Flash connection mode : 2 where 0 - Single; 1 - Stacked; 2 - Parallel FCTIndex: 10 ReadCmd: 0x6B, WriteCmd: 0x2, StatusCmd: 0x70, FSRFlag: 1 Successfully ran QSPIPSU PollData and PollTimeout Example |
---|
Generic QSPI Non-blocking read Example
This examples does read in non blocking polled mode from the SPI-NOR flash device.
Expected Output
QSPIPSU Generic Flash Non Blocking Read Example Test FlashID=0x20 0xBB 0x21 Flash connection mode : 2 where 0 - Single; 1 - Stacked; 2 - Parallel FCTIndex: 10 ReadCmd: 0x6B, WriteCmd: 0x2, StatusCmd: 0x70, FSRFlag: 1 Successfully ran QSPIPSU Generic Flash Non Blocking Read Example |
---|
Generic QSPI Write Protection Example
This example tests the write protection feature of the SPI-NOR flash device
Expected Output
QSPIPSU Write Protect Example Test Cfg Init done, Baseaddress: 0xF1030100 FlashID=0x20 0xBB 0x21 Flash connection mode : 2 where 0 - Single; 1 - Stacked; 2 - Parallel FCTIndex: 10 ReadCmd: 0xB, WriteCmd: 0x2, StatusCmd: 0x70, FSRFlag: 1 Successfully ran QSPIPSU Write Protect Example |
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Example Design Architecture
NA
Performance
Single
Qspipsu write throughput is 1326 KBPS
Qspipsu read throughput is 28339 KBPS
Dual-Parallel
Qspipsu write throughput is 2438 KBPS
Qspipsu read throughput is 54245 KBPS
Change Log
2024.1
https://github.com/Xilinx/embeddedsw/blob/xlnx_rel_v2024.1/doc/ChangeLog#L512
2023.2
https://github.com/Xilinx/embeddedsw/blob/xlnx_rel_v2023.2/doc/ChangeLog#L590
2023.1
2022.2
2022.1
https://github.com/Xilinx/embeddedsw/blob/xilinx_v2022.1/doc/ChangeLog#L69
2021.2
2021.1
https://github.com/Xilinx/embeddedsw/blob/xilinx_v2021.1/doc/ChangeLog#L374
2020.2
https://github.com/Xilinx/embeddedsw/blob/xilinx-v2020.2/doc/ChangeLog#L653
2020.1
https://github.com/Xilinx/embeddedsw/blob/xilinx-v2020.1/doc/ChangeLog#L95
2019.2
https://github.com/Xilinx/embeddedsw/blob/xilinx-v2019.2/doc/ChangeLog#L70
2019.1
https://github.com/Xilinx/embeddedsw/blob/xilinx-v2019.1/doc/ChangeLog#L132
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