This page gives an overview of sdps driver which is available as part of the Xilinx Vivado and SDK distribution.
Source path for the driver:https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/sdps/
Driver source code is organized into different folders. Below diagram shows the sdps driver source organization
-- Doc - Provides the API and data structure details
- Source - Driver source files
Features Supported by HW/SW
- 1 or 4 bit bus width
- Normal or High speed (and configurable clock)
- ADMA2 transfers
- Polled mode
- Switch command
- All ACMD’s and CMD’s involved in initialization and transfer states
- Configurable block size
- Block and direct addressable
- Error detection
Features Not Supported
- SDMA mode
- Programmed IO mode
- Lock/Unlock/Write protection
Known issues and Limitations
Driver supports only polled mode.
The file system example is xilffs_polled_example.c
This file system example creates a new file in an SD/eMMC card (formatted with file system) writes a sequence into the files and reads it back to verify. This example can be modified to write user data to a file or read existing files as required. The API’s are standard file system API’s.codecode
- Added support for mkfs in the sd driver. It will calculate the sector size and number of sectors to identify the card capacity.
- Used usleep API across all the platforms, since MB_SLEEP API is deprecated.
- Added bus_width, mio_bank and has_emio parameters to tcl file to export to xparameters.h
- Added support for UHS mode switching based on the card capability.
- Added Tap delays inside the drivers required for High Speed modes and UHS modes.
- Reduce the delay during power cycle from one second to one milli second.
- Used emmc_hwreset pin to reset eMMC card rather than relying on power cycle.
- Enable Rst_n bit in EXT_CSD reg if disabled - This is to enable hw reset functionality in eMMC device.
- Implemented revived auto-tuning workaround by implementing dll_reset during tuning process.
AR# 68109 - for SD boot time increase in 2016.3
- Added support for word access system
- Resolved compilation issues with ARMCC and ICCARM compilers
- Added cache invalidation after getting bus width information as ARM suggested.