ZynqMP Standalone DisplayPort Driver

Table of Contents


This page gives overview of Zynq DisplayPort Subsystem which available as part of the Xilinx Vivado and SDK distribution.

The Subsystem is divided into 3 drivers
  1. dppsu - DisplayPort Controller 
  2. avbuf - Video Pipeline interface to PL and Memory
  3. dpdma - DispayPort DMA for reading audio video from the memory

How to enable

1. dppsu - https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/dppsu
2. avbuf - https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/avbuf
3. dpdma - https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/dpdma

Driver source code is organized into different folders. Below diagram shows the driver source organization

-- Doc - Provides the API and data structure details
- Examples - Reference application to show how to use the driver APIs and calling sequence
- Source - Driver source files

Supported Features

The following features are supported:
  • DisplayPort v1.2a
  • 1 or 2 lanes main link.
  • 1.62G/2.7G/5.4G Line rates.
  • Source only controller.
  • Support Video resolution up to 4kx2k @ 30 Hz
  • APB interface for register access.
  • Direct 'live' video input from the PL in the form of native video.
  • Direct 'live' audio input from the PL in AXIS Format. (Only 2-channel audio support)
  • Support for 44.1kHz and 48kHz audio
  • Supports alpha blending of 2 video/graphics sources (one live and one nonlive, or 2 nonlive sources)
  • Support mixing of 2 audio sources. (16-bit audio from non-live source and 24-bit audio from live-source)
  • Supports alpha value embedded in graphics data or global alpha from a register
  • Provides a free running System Time Clock (STC) counter at 27MHz
  • Provides STC timestamps for A/V presentation units.
  • Provide STC timestamps for external events from the PL.
  • Supports video formats including Y-only, RGB, YCbCr, 4:4:4, 4:2:2 and 4:2:0(from buffers). On display, supports Y-only, RGB, YUV 444, and 422 (no 420 support)
  • Supports xvYCC display.
  • Supports AUX channel and Hot Plug Detect (HPD).
  • Supports live video/live graphics at 6, 8, 10 & 12 bits per color.
  • Supports Video formats including Y-only, RGB, YUV 444 and YUV 422 on live video and graphics
  • Supports 256-color palette translation for frame-buffer data. Palette data can be RGB or YUV. When YUV, it has to write in the order: Cr Y Cb
  • Support frame buffer formats, including 1,2,4,8,16,24, and 32 bits per pixel.
  • Provides test pattern generator as replacement to one of the 2 rendering sources on stream1.
  • Provides the blended video/audio to the PL via native video output or streaming AXI.
  • Provides chroma upsampling and colorspace conversion prior to alpha blending.
  • Provides colorspace conversion and chroma subsampling after alpha blending.
  • Supports background color.
  • Support full screen display. (No support for up/down-scaling)
  • Supports partial video overlay over graphics.
  • Supports interleaved frame buffer formats.
  • Supports planar Y and Cb and Cr frame buffers

Known issues and limitations

The driver supports all the features except
1. Chroma Keying
2. Dithering

Test Procedure

Use case - Memory based data path (non-live)
The example in the DPDMA driver demonstrates the usage of the non-live(memory) data path. To enable this driver, dppsu should be selected under psu_dp and dpdma should be selected under psu_dpdma in the system.mss file.

Use case - PL to DP data path
To test this use case, psu_dp needs to be selected to dppsu and in the avbuf api will enable the access to the PL. Refer DPDMA example for the usage of the API.

Use case - PL to PL data path
To test this use case, psu_dp needs to be selected to avbuf.

Use case - Memory to PL data path
To test this use case, psu_dp needs to be selected to avbuf and the

Change Log


  • avbuf - fixed RGB565 scaling factors
  • avbuf - PLL offset handling to fix the clock offset
  • dpdma - Fixed the compilation issue in the examples.

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