This page gives an overview of the DisplayPort driver which is available as part of the ZynqMP Linux distribution. The main driver is based on the Linux DRM KMS display subsystem. Additional drivers are based on other systems: DMA engine driver for DPDMA and ALSA driver for audio support.

Paths, files, links and documentation on this page are given relative to the Linux kernel source tree.
For information on the underlying hardware, see UG1085.

HW IP features

Features in bold are supported by the driver

Based on the VESA DisplayPort V.12a source-only specification.
Video support for the following:
° Resolution up to 4K x 2K at 30Fps.
° Y-only, YCbCr444, YCbCr422, YCbCr420, and RGB video formats.
° 6, 8, 10, or 12 bits per color components.
° Progressive video.
° A 36-bit native video input interface to capture live video.
° Non-live video from frame buffers using internal DPDMA.
Graphics support for the following:
° Non-live graphics from the frame buffer.
° 36-bit native video interface along with an 8-bit alpha channel to capture live graphics.
° 2-plane, on-the-fly rendering of video and graphics.
° Chroma upsampling.
° Chroma downsampling.
° Color space conversion from YCbCr to RGB and vice versa.
° Video blending.
° Chroma keying.
Audio support for the following:
° Up to two audio channels.
° Sample size of up to 24 bits.
° Maximum sample rate of 48 KHz.
° Live 24-bit audio from the PL.
° Non-live 16-bit audio from the frame buffer.
Audio mixer and volume control.
° Mixing of two audio streams of the same sampling rate and channel count.
° Provides gain control for audio streams.
Streaming A/V output back to the PL.
Includes a system time clock (STC) that is compliant with the ISO/IEC 13818-1 standard. Provides time stamping of the A/V presentation unit.

Missing Features, Known Issues and Limitations

Missing Features

This section summarizes the known issues and missing features (or experimental)

Live support is experimental feature
- Live input is supported as experimental (live input)
- Live output hasn't been fully verified
Pixel formats
- 12 bit YUV formats are not supported
Interop
- Some monitor may not sync reliably. Please refer to ZU+ supported monitors

Limitation

Both layers (drm planes) should be in the same size. Otherwise, if the requested size is different, the driver returns an error. This is hardware limitation.

Important AR links

ZU+ supported monitors

Note

The driver implementation has switched to the new driver in 2018.1, which supports new software features with more modular / scalable structure. The behavior of some APIs may be different, as well as the driver name from "xilinx_drm" to "xlnx".

Kernel Configuration

The dedicated DMA engine for DisplayPort should be enabled.
CONFIG_XILINX_DPDMA=y
The following config options are optional and required for audio support.
CONFIG_SOUND=y
CONFIG_SND=y
CONFIG_SND_SOC=y
CONFIG_SND_SOC_XILINX_DP=y
The driver, as some other multimedia drivers, needs CMA chunk. The following config options are recommended.
CONFIG_CMA=y
CONFIG_DMA_CMA=y
CONFIG_CMA_SIZE_MBYTES=256

The below is for new driver (>= 2018.1)
The following config options should be enabled in order to build the DisplayPort driver
CONFIG_DRM_XLNX=y
CONFIG_DRM_XLNX_BRIDGE=y
CONFIG_DRM_XLNX_BRIDGE_DEBUG_FS=y
CONFIG_DRM_ZYNQMP_DPSUB=y

The below is for old driver (< 2018.1)
The following config options should be enabled in order to build the DisplayPort driver
CONFIG_DRM=y
CONFIG_DRM_XILINX=y
CONFIG_DRM_XILINX_DP=y
CONFIG_DRM_XILINX_DP_SUB=y

Devicetree

The below is for new driver (>= 2018.1)
The snippet:
- zynqmp-display: zynqmp-display
The dt binding doc: Documentation/devicetree/bindings/display/xlnx/xlnx,zynqmp-dpsub.txt
- xlnx,zynqmp-dpsub.txt

The below is for old driver (< 2018.1)
Device tree nodes required are as below in "arch/arm64/boot/dts/xilinx/zynqmp.dtsi"
- Xilinx drm: xilinx drm node
- dp: dp
- dp subsystem: dp_sub
- dpdma: dpdma
For audio support
- alsa nodes: card, codec, pcm

For more details, Please refer to "Documentation/devicetree/bindings/drm/xilinx"
- dp.txt
- dp_sub.txt
- xilinx_drm.txt

Implementation

Power Management

The display pipeline is enabled and disabled upon the monitor HPD (hot plug detect) events. When there's disconnect event the DRM framework disables the pipeline. For the connect event the pipeline is enabled. The detect callback below from DP driver reports the connection status. This management is called DPMS (Display Power Management Signaling).

static enum drm_connector_status
zynqmp_dp_connector_detect(struct drm_connector *connector, bool force)
{
        if () {
                ....
                return connector_status_connected;
        }
 
disconnected:
        return connector_status_disconnected;
}

Upon the event, the DRM framework enables and disables the pipeline if possible. The below, the drm_kms_helper_hotplug_event() will disable or enable the fb console based on the event type.

bool drm_helper_hpd_irq_event(struct drm_device *dev)
{
                ...
                connector->status = drm_helper_probe_detect(connector, NULL, false);
                ....
 
        if (changed)
                drm_kms_helper_hotplug_event(dev);
 
        return changed;
}
EXPORT_SYMBOL(drm_helper_hpd_irq_event);

The event also goes into userspace through sysfs, so that any actively running application (ex, Xorg) can handle the event properly

void drm_kms_helper_hotplug_event(struct drm_device *dev)
{
        /* send a uevent + call fbdev */
        drm_sysfs_hotplug_event(dev);
        if (dev->mode_config.funcs->output_poll_changed)
                dev->mode_config.funcs->output_poll_changed(dev);
}
EXPORT_SYMBOL(drm_kms_helper_hotplug_event);

The userspace can handle the event. The below is the example of handling for Xorg,
https://github.com/Xilinx/meta-petalinux/blob/4e84d60865bf505d1ea425f3e5c84e37bf8f7455/recipes-core/udev/eudev/monitor-hotplug.sh

#!/bin/sh
#Adapt this script to your needs.
 
DEVICES=$(find /sys/class/drm/*/status)
 
#inspired by /etc/acpd/lid.sh and the function it sources
 
displaynum=`ls /tmp/.X11-unix/* | sed s#/tmp/.X11-unix/X##`
display=":$displaynum.0"
export DISPLAY=":$displaynum.0"
 
# from https://wiki.archlinux.org/index.php/Acpid#Laptop_Monitor_Power_Off
export XAUTHORITY=$(ps -C Xorg -f --no-header | sed -n 's/.*-auth //; s/ -[^ ].*//; p')
 
for i in /sys/class/drm/*/*/status ; do
status=$(cat $i);
connector=${i%/status*};
connector=${connector#*-};
if [ "$status" == "disconnected" ];
then
    xset dpms force off
elif [ "$status" == "connected" ];
then
    xset dpms force on
    if [ "$(xrandr | grep '\*')" = "" ];
    then
        xrandr --output $connector --auto
    fi
fi
done

At the driver level, when the pipeline is enabled / disabled, whatever necessary are notified (pmu fw) and enabled / disabled accordingly, including clock, dma, phy, and DP itself. Below is the enabling / disabling of display components such as clock, dma, and the IP. And enabling / disabling the encoder involves phy, connected monitor, transmitter,,,.

static void
zynqmp_disp_crtc_atomic_enable(struct drm_crtc *crtc,
                               struct drm_crtc_state *old_crtc_state)
{
        ...
 
        pm_runtime_get_sync(disp->dev);
        ret = zynqmp_disp_clk_enable(disp->pclk, &disp->pclk_en);
        if (ret) {
                dev_err(disp->dev, "failed to enable a pixel clock\n");
                return;
        }
        ...
        zynqmp_disp_enable(disp);
        ...
}

static void
zynqmp_disp_crtc_atomic_disable(struct drm_crtc *crtc,
                                struct drm_crtc_state *old_crtc_state)
{
        ...
 
        zynqmp_disp_clk_disable(disp->pclk, &disp->pclk_en);
        zynqmp_disp_plane_disable(crtc->primary);
        zynqmp_disp_disable(disp, true);
        pm_runtime_put_sync(disp->dev);
}

static void zynqmp_dp_encoder_enable(struct drm_encoder *encoder)
{
        ...
        pm_runtime_get_sync(dp->dev);
        dp->enabled = true;
        zynqmp_dp_init_aux(dp);
        ...
        if (zynqmp_disp_aud_enabled(dp->dpsub->disp))
                zynqmp_dp_write(iomem, ZYNQMP_DP_TX_AUDIO_CONTROL, 1);
        zynqmp_dp_write(iomem, ZYNQMP_DP_TX_PHY_POWER_DOWN, 0);
        if (dp->status == connector_status_connected) {
                for (i = 0; i < 3; i++) {
                        ret = drm_dp_dpcd_writeb(&dp->aux, DP_SET_POWER,
                                                 DP_SET_POWER_D0);
                        if (ret == 1)
                                break;
                        usleep_range(300, 500);
                }
                /* Some monitors take time to wake up properly */
                msleep(zynqmp_dp_power_on_delay_ms);
        }
        ...
        zynqmp_dp_write(iomem, ZYNQMP_DP_TX_SW_RESET,
                        ZYNQMP_DP_TX_SW_RESET_ALL);
        zynqmp_dp_write(iomem, ZYNQMP_DP_TX_ENABLE_MAIN_STREAM, 1);
}

static void zynqmp_dp_encoder_disable(struct drm_encoder *encoder)
{
        ...
        zynqmp_dp_write(iomem, ZYNQMP_DP_TX_ENABLE_MAIN_STREAM, 0);
        drm_dp_dpcd_writeb(&dp->aux, DP_SET_POWER, DP_SET_POWER_D3);
        zynqmp_dp_write(iomem, ZYNQMP_DP_TX_PHY_POWER_DOWN,
                        ZYNQMP_DP_TX_PHY_POWER_DOWN_ALL);
        if (zynqmp_disp_aud_enabled(dp->dpsub->disp))
                zynqmp_dp_write(iomem, ZYNQMP_DP_TX_AUDIO_CONTROL, 0);
        pm_runtime_put_sync(dp->dev);
}

The system level suspend and resume is handled at the upper level, called xlnx drv, which will shut down or turn on the entire pipeline.

static int __maybe_unused xlnx_pm_suspend(struct device *dev)
{
        struct xlnx_drm *xlnx_drm = dev_get_drvdata(dev);
        struct drm_device *drm = xlnx_drm->drm;
 
        drm_kms_helper_poll_disable(drm);
 
        xlnx_drm->suspend_state = drm_atomic_helper_suspend(drm);
        if (IS_ERR(xlnx_drm->suspend_state)) {
                drm_kms_helper_poll_enable(drm);
                return PTR_ERR(xlnx_drm->suspend_state);
        }
 
        return 0;
}
 
static int __maybe_unused xlnx_pm_resume(struct device *dev)
{
        struct xlnx_drm *xlnx_drm = dev_get_drvdata(dev);
        struct drm_device *drm = xlnx_drm->drm;
 
        drm_atomic_helper_resume(drm, xlnx_drm->suspend_state);
        drm_kms_helper_poll_enable(drm);
 
        return 0;
}

Applications

This section describes the example commands in drm or Xorg environment.

DRM

modetest is the test application available from libdrm: https://cgit.freedesktop.org/mesa/drm/tree/tests/modetest.

For information on boot args see Xilinx DRM KMS related bootargs.

The below is the help from the application. Please note, some arguments / commands changes.

root@xilinx-zcu106-zu7-es2-2018_1:~# modetest --help
usage: modetest [-cDdefMPpsCvw]
 
 Query options:
 
        -c      list connectors
        -e      list encoders
        -f      list framebuffers
        -p      list CRTCs and planes (pipes)
 
 Test options:
 
        -P <plane_id>@<crtc_id>:<w>x<h>[+<x>+<y>][*<scale>][@<format>]  set a plane
        -s <connector_id>[,<connector_id>][@<crtc_id>]:<mode>[-<vrefresh>][@<format>]   set a mode
        -C      test hw cursor
        -v      test vsynced page flipping
        -w <obj_id>:<prop_name>:<value> set property
 
 Generic options:
 
        -d      drop master after mode set
        -M module       use the given driver
        -D device       use the given device
 
        Default is to dump all info.

Running the modetest with driver id string lists available modes / properties from the connected monitor. Please note the IDs are not fixed and changes due to framework updates or so.

Available modes under connector@38
Current framebuffer set to crtc@36
Available planes (layers): plane@34 and plane@35
List of supported formats for each plane
Alpha properties of plane@35

Please note, the driver name has been changed to xlnx for release >= 2018.1. For release <= 2017.4, the ID is 'xilinx_drm'. Alternatively, the bus id can be used with '-D' option. The bus id is the device specific id to differentiate between devices under same drm driver. The bus id can be found by cat /sys/kerne/debug/dri/0/name. The bus id for ZynqMP DP is 'fd4a0000.zynqmp-display'. The value should be set differently for each device.

root@xilinx-zcu106-zu7-es2-2018_1:~# modetest -M xlnx
Encoders:
id      crtc    type    possible crtcs  possible clones
37      36      TMDS    0x00000001      0x00000000
 
Connectors:
id      encoder status          name            size (mm)       modes   encoders
38      37      connected       DP-1            530x300         29      37
  modes:
        name refresh (Hz) hdisp hss hse htot vdisp vss vse vtot)
  3840x2160 30 3840 3888 3920 4000 2160 2163 2168 2191 262750 flags: phsync, nvsync; type: driver
  2560x1440 60 2560 2608 2640 2720 1440 1443 1448 1481 241500 flags: phsync, nvsync; type: driver
  2048x1280 60 2048 2192 2416 2784 1280 1281 1284 1325 221277 flags: nhsync, pvsync; type:
  1920x1200 60 1920 2056 2256 2592 1200 1203 1209 1245 193250 flags: nhsync, pvsync; type: driver
  1920x1080 60 1920 2008 2052 2200 1080 1082 1087 1125 148500 flags: phsync, pvsync; type: driver
  1920x1080 60 1920 2008 2052 2200 1080 1084 1089 1125 148500 flags: phsync, pvsync; type: driver
  1920x1080 60 1920 2008 2052 2200 1080 1084 1089 1125 148352 flags: phsync, pvsync; type: driver
  1920x1080 50 1920 2448 2492 2640 1080 1084 1089 1125 148500 flags: phsync, pvsync; type: driver
  1920x1080 24 1920 2558 2602 2750 1080 1084 1089 1125 74250 flags: phsync, pvsync; type: driver
  1920x1080 24 1920 2558 2602 2750 1080 1084 1089 1125 74176 flags: phsync, pvsync; type: driver
  1600x1200 60 1600 1664 1856 2160 1200 1201 1204 1250 162000 flags: phsync, pvsync; type: driver
  1600x900 60 1600 1624 1704 1800 900 901 904 1000 108000 flags: phsync, pvsync; type: driver
  1280x1024 75 1280 1296 1440 1688 1024 1025 1028 1066 135000 flags: phsync, pvsync; type: driver
  1280x1024 60 1280 1328 1440 1688 1024 1025 1028 1066 108000 flags: phsync, pvsync; type: driver
  1152x864 75 1152 1216 1344 1600 864 865 868 900 108000 flags: phsync, pvsync; type: driver
  1280x720 60 1280 1390 1430 1650 720 725 730 750 74250 flags: phsync, pvsync; type: driver
  1280x720 60 1280 1390 1430 1650 720 725 730 750 74176 flags: phsync, pvsync; type: driver
  1280x720 50 1280 1720 1760 1980 720 725 730 750 74250 flags: phsync, pvsync; type: driver
  1024x768 75 1024 1040 1136 1312 768 769 772 800 78750 flags: phsync, pvsync; type: driver
  1024x768 60 1024 1048 1184 1344 768 771 777 806 65000 flags: nhsync, nvsync; type: driver
  800x600 75 800 816 896 1056 600 601 604 625 49500 flags: phsync, pvsync; type: driver
  800x600 60 800 840 968 1056 600 601 605 628 40000 flags: phsync, pvsync; type: driver
  720x576 50 720 732 796 864 576 581 586 625 27000 flags: nhsync, nvsync; type: driver
  720x480 60 720 736 798 858 480 489 495 525 27027 flags: nhsync, nvsync; type: driver
  720x480 60 720 736 798 858 480 489 495 525 27000 flags: nhsync, nvsync; type: driver
  640x480 75 640 656 720 840 480 481 484 500 31500 flags: nhsync, nvsync; type: driver
  640x480 60 640 656 752 800 480 490 492 525 25200 flags: nhsync, nvsync; type: driver
  640x480 60 640 656 752 800 480 490 492 525 25175 flags: nhsync, nvsync; type: driver
  720x400 70 720 738 846 900 400 412 414 449 28320 flags: nhsync, pvsync; type: driver
  props:
        1 EDID:
                flags: immutable blob
                blobs:
 
                value:
                        00ffffffffffff0010acbea04c433930
                        171a0104a5351e783ae245a8554da326
                        0b5054a54b00714f8180a9c0a940d1c0
                        e100d10001014dd000a0f0703e803e30
                        35000f282100001a000000ff00473344
                        37463636313039434c0a000000fc0044
                        454c4c205032343135510a20000000fd
                        001d4c1e8c36000a2020202020200135
                        02031df150101f200514041312110302
                        161507060123091f0783010000565e00
                        a0a0a02950302035000f282100001a02
                        3a801871382d40582c25000f28210000
                        1e011d007251d01e206e2855000f2821
                        00001ea36600a0f0701f80302035000f
                        282100001a0000000000000000000000
                        000000000000000000000000000000eb
        2 DPMS:
                flags: enum
                enums: On=0 Standby=1 Suspend=2 Off=3
                value: 0
        5 link-status:
                flags: enum
                enums: Good=0 Bad=1
                value: 0
        39 sync:
                flags: range
                values: 0 1
                value: 0
        40 bpc:
                flags: enum
                enums: 6BPC=6 8BPC=8 10BPC=10 12BPC=12
                value: 8
 
CRTCs:
id      fb      pos     size
36      64      (0,0)   (3840x2160)
  3840x2160 30 3840 3888 3920 4000 2160 2163 2168 2191 262750 flags: phsync, nvsync; type: driver
  props:
        29 output_color:
                flags: enum
                enums: rgb=0 ycrcb444=1 ycrcb422=2 yonly=3
                value: 0
        30 bg_c0:
                flags: range
                values: 0 4095
                value: 0
        31 bg_c1:
                flags: range
                values: 0 4095
                value: 0
        32 bg_c2:
                flags: range
                values: 0 4095
                value: 0
 
Planes:
id      crtc    fb      CRTC x,y        x,y     gamma size      possible crtcs
34      0       0       0,0             0,0     0               0x00000001
  formats: VYUY UYVY YUYV YVYU YU16 YV16 YU24 YV24 NV16 NV61 BG24 RG24 XB24 XR24 XB30 XR30 YU12 YV12 NV12 NV21 XV15 XV20
  props:
        6 type:
                flags: immutable enum
                enums: Overlay=0 Primary=1 Cursor=2
                value: 0
        33 tpg:
                flags: range
                values: 0 1
                value: 0
35      36      64      0,0             0,0     0               0x00000001
  formats: AB24 AR24 RA24 BA24 BG24 RG24 RA15 BA15 RA12 BA12 RG16 BG16
  props:
        6 type:
                flags: immutable enum
                enums: Overlay=0 Primary=1 Cursor=2
                value: 1
        27 alpha:
                flags: range
                values: 0 255
                value: 255
        28 g_alpha_en:
                flags: range
                values: 0 1
                value: 1
 
Frame buffers:
id      size    pitch

To set the test pattern on the crtc, 'RG16' can be replaced with any other format from primary plane (plane@35).

root@xilinx-zcu106-zu7-es2-2018_1:~# modetest -M xlnx -s 38:1920x1080@RG16
setting mode 1920x1080-60Hz@RG16 on connectors 38, crtc 36

To enable the overlay plane, use '-P' with arguments below. 'YUYV' can be replaced with any other format from overlay plane (plane@34).

root@xilinx-zcu106-zu7-es2-2018_1:~# modetest -M xlnx -s 38:1920x1080@RG16 -P 34@36:1920x1080@YUYV
setting mode 1920x1080-60Hz@RG16 on connectors 38, crtc 36
testing 1920x1080@YUYV overlay plane 34

plane@34 wouldn't be visible as plane@35 is always on top. Set the alpha property using '-w'.

root@xilinx-zcu106-zu7-es2-2018_1:~# modetest -M xlnx -s 38:1920x1080@RG16 -P 34@36:1920x1080@YUYV -w 35:alpha:100
setting mode 1920x1080-60Hz@RG16 on connectors 38, crtc 36
testing 1920x1080@YUYV overlay plane 34

The modetest also demonstrates the page flipping with '-v' option. The command flips two buffers and prints the framerate.

root@xilinx-zcu106-zu7-es2-2018_1:~# modetest -M xlnx -s 38:1920x1080@RG16 -P 34@36:1920x1080@YUYV -w 35:alpha:100 -v
setting mode 1920x1080-60Hz@RG16 on connectors 38, crtc 36
testing 1920x1080@YUYV overlay plane 34
freq: 60.10Hz
freq: 59.99Hz

Enabling The Zynq MPSoC DisplayPort Controller internal TPG via modetest.
NOTE: that the TPG command below should only be used before running modetest -P.

modetest -D fd4a0000.zynqmp-display -w 34:tpg:1 -w 35:alpha:100

Live Input

The live input can be configured through Xilinx bridge interface (https://github.com/xilinx//linux-xlnx/blob/xilinx-v2018.2/drivers/gpu/drm/xlnx/xlnx_bridge.h#L65), which is the kernel level APIs. The APIs can be used directly by the client driver, ex V4L TPG driver. The interface is also available through debugfs for userspace application to control, as this feature is experimental stage as of 2018.2 release.

The live input requires the clock and timing to be generated from PL, so that such requirement should be reflected in the PL design. The clock should be specified in the devicetree, with 'dp_live_video_in_clk' (http://github.com/xilinx/linux-xlnx/blob/xilinx-v2018.2/Documentation/devicetree/bindings/display/xlnx/xlnx%2Czynqmp-dpsub.txt#L20). The driver will automatically switches to PL clock when switching to live input. The DT binding doc describes as below.

- clocks: phandles for axi, audio, non-live video, and live video clocks.
  axi clock is required. Audio clock is optional. If not present, audio will
  be disabled. One of non-live or live video clock should be present.
- clock-names: The identification strings are required. "aclk" for axi clock.
  "dp_aud_clk" for audio clock. "dp_vtc_pixel_clk_in" for non-live video clock.
  "dp_live_video_in_clk" for live video clock (clock from programmable logic).

As an example, if the si570 is connected to DP live clock through FPGA logic, the DT change is as below.

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
index a02ad79..dd747d0 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
@@ -272,7 +272,7 @@
 };
 
 &zynqmp_dpsub {
-       clocks = <&dp_aclk>, <&clk 17>, <&clk 16>;
+       clocks = <&dp_aclk>, <&clk 17>, <&clk 16>, <&si570_1>;
 };
 
 &xlnx_dpdma {
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index fb196a1..acd7cf2 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -1151,7 +1151,8 @@
                        interrupt-parent = <&gic>;
 
                        clock-names = "dp_apb_clk", "dp_aud_clk",
-                                     "dp_vtc_pixel_clk_in";
+                                     "dp_vtc_pixel_clk_in",
+                                     "dp_live_video_in_clk";
 
                        power-domains = <&pd_dp>;

There are two live inputs available, video and graphics, and two debugfs entries are available.

/sys/kernel/debug/xlnx-bridge/xlnx_bridge-vid-layer
/sys/kernel/debug/xlnx-bridge/xlnx_bridge-gfx-layer

Some operations can be done through debugfs: enable / disable / set_input:
http://github.com/xilinx/linux-xlnx/blob/xilinx-v2018.2/drivers/gpu/drm/xlnx/xlnx_bridge.c#L310. But please note, debugfs is not treated as stable ABI, so any application shouldn't rely on specific ABI, meaning it may change from one version to another.
The below command will set video layer to use live input.

echo "set_input 1920 1080 0x100e" > /sys/kernel/debug/xlnx-bridge/xlnx_bridge-vid-layer
echo "enable" > /sys/kernel/debug/xlnx-bridge/xlnx_bridge-vid-layer

For 'set_input', 1st arg = width, 2nd arg = height, 3rd arg = media bus format (from media-bus-format.h). 0x100e maps to RGB24 (
http://github.com/xilinx/linux-xlnx/blob/xilinx-v2018.2/include/uapi/linux/media-bus-format.h#L49)
This assumes that the logic connected to live input (ex, TPG / VTC) are already configured prior to enable command. Then the live input can be disabled as below.

echo "disable" > /sys/kernel/debug/xlnx-bridge/xlnx_bridge-vid-layer

ALSA

The "aplay" is an ALSA (Linux audio/sound subsystem) example and demonstrates the audio play. The command sends audio data on specific pcm channel which is audible at DPout.

aplay test.wav -d 30 -D hw:0,0 ,For PCM0
aplay test.was -d 30 -D hw:0,1 ,For PCM1

Xorg

Xorg automatically launches at boot up. If needed to run manually,

Xorg&

Xorg clients look for the env variable to find corresponding server. Thus export before running clients from serial console.

export DISPLAY=:0.0

Run window manager and desktop session (matchbox example).

matchbox-window-manager&
matchbox-session&

'xrandr' is to display and change the resolutions.

root@plnx_aarch64:~# xrandr
Screen 0: minimum 320 x 200, current 3840 x 2160, maximum 4096 x 4096
DP-1 connected 3840x2160+0+0 953mm x 543mm
   3840x2160     29.98*
   2560x1600     59.97
   1920x1080     60.00    50.00    59.94
   1680x1050     59.95
   1280x1024     75.02    60.02
   1440x900      74.98    59.89
   1280x960      60.00
   1366x768      59.79
   1280x720      60.00    50.00    59.94
   1024x768      75.03    60.00
   800x600       75.00    60.32
   720x576       50.00
   720x480       60.00    59.94
   640x480       75.00    72.81    66.67    60.00    59.94
   720x400       70.08
root@plnx_aarch64:~# xrandr -s 1920x1080
root@plnx_aarch64:~# xrandr -s 640x480

'xset' changes some setting. Change of power states can be done as below.

root@plnx_aarch64:~# sleep 1; xset dpms force on  #Sleep adds a delay to help X from getting confused on the order of events
root@plnx_aarch64:~# sleep 1; xset dmps force off

Disable Xorg Timeouts

The default settings for Xorg may cause the screen to go black after a 10 minute timeout. The user can disable these in their xorg.conf file using "ServerFlasgs" options as follows.

/etc/X11/xorg.conf

Section "InputDevice"
	Identifier	"System Mouse"
	Driver		"mouse"
	Option		"Device" "/dev/input/mouse0"
EndSection

Section "InputDevice"
	Identifier	"System Keyboard"
	Driver		"kbd"
	Option		"Device" "/dev/input/event0"
EndSection

Section "Device"
        Identifier      "ZynqMP"
        Driver          "armsoc"
        Option          "DRI2"                  "true"
        Option          "DRI2_PAGE_FLIP"        "false"
        Option          "DRI2_WAIT_VSYNC"       "true"
        Option          "SWcursorLCD"           "false"
        Option          "DEBUG"                 "false"
EndSection

Section "Screen"
        Identifier      "DefaultScreen"
        Device          "ZynqMP"
        DefaultDepth    16
EndSection

Section "ServerFlags"
        Option          "BlankTime"             "0"
        Option          "StandbyTime"           "0"
        Option          "SuspendTime"           "0"
        Option          "OffTime"               "0"
EndSection

Xilinx Wiki

ZynqMP DisplayPort Linux driver

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