Axi timer
Axi timer
Table of Contents
AXI Timer
Introduction
This page gives an overview of Axi Timer Linux driver which is available as part of the Linux distribution.The LogiCORE™ IP AXI Timer/Counter is a 32/ 64-bit timer module that interfaces to the AXI4-Lite interface.
HW IP features
- AXI interface based on the AXI4-Lite specification
- Two programmable interval timers with interrupt, event generation, and event capture capabilities
- Configurable counter width
- One Pulse Width Modulation (PWM) output
- Cascaded operation of timers in generate and capture modes
Kernel Configuration
Existing driver ( https://github.com/Xilinx/linux-xlnx/blob/xlnx_rebase_v5.4_2020.1/arch/microblaze/kernel/timer.c) is tightly coupled with Microblaze processor. By default it would be used as "arch timer" for Microblaze.
Devicetree
axi_timer_1: timer@41c00000 { clock-frequency = <100000000>; clocks = <&clk_bus_0>; compatible = "xlnx,xps-timer-1.00.a"; interrupt-parent = <&axi_intc_1>; interrupts = <2 2>; reg = <0x41c00000 0x10000>; xlnx,count-width = <0x20>; xlnx,one-timer-only = <0x0>; };
Mainline status
Existing driver https://github.com/Xilinx/linux-xlnx/blob/master/arch/microblaze/kernel/timer.c is in sync with mainline, except changes related to SMP support.
Boot log snippet
/amba_pl/timer@41c00000: irq=2 xilinx_timer_set_mode: shutdown xilinx_timer_set_mode: periodic sched_clock: 32 bits at 100MHz, resolution 10ns, wraps every 42949672950ns
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Changelog
2024.1
None
2023.2
- None
2023.1
- None
2022.2
- None
2022.1
- None
2021.2
- Addressed warnings reported by coverity tool
2021.1
- None
2020.2
- None
2020.1
- Updated driver to support SMP Microblaze systems
2019.2
- None
2019.1
- microblaze: Remove architecture heart beat code
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