The ZynqMP reset-controller has the ability to reset lines connected to different blocks and peripheral in the Soc.
This page gives an overview of the ZynqMP reset-controller driver which is available as part of the ZynqMP Linux distribution.
Paths, files, links and documentation on this page are given relative to the Linux kernel source tree.
Below links provide the information about the reset-controller linux framework
HW IP Features.
- Ability to reset the lines connected to different blocks and peripheral in the Soc
Missing Features, Known Issues and Limitations
Device Drivers --->[*] Reset Controller Support--->[*] Xilinx ZYNQMP Reset Controller Support
The following commit will give you the better understanding and the exact use case of the reset controller.
The Reset-controller driver itself will not initiate any IP reset request.
The Reset request always initiated by the consumer driver as shown in the above commit id
The below patch created only for testing purpose.
apply the patch 0001-Reset-Added-sysfs-entries-for-zynqmp-reset-controlle.patch
This patch has debug sysfs entry so that the reset controller driver can be tested from user space
1) echo reset_IP_num > /sys/class/reset-mgr/reset ----> It will reset the IP by providing the High to low signal.
2) echo reset_IP_num > /sys/class/reset-mgr/reset_assert ---> it will assert IP by providing the HIGH signal ( the relevant bit is set to High until it receives deassert signal).
3) echo reset_IP_num> /sys/class/reset-mgr/reset_deassert ---> it will deassert IP by providing the LOW signal
Reset_IP_num are available here:
This driver is in Mainline.
Fixes related to coverity warnings are not yet in mainline (~2 lines)
Sync Mainline changes
- reset: reset-zynqmp: Sync Reset Id macro with Mainline
- reset: reset-zynqmp: Move eemi_ops inside zynqmp_reset_data struct
- reset: reset-zynqmp: Defer probe if firmware is not ready
- reset: reset-zynqmp: License fix and copyright update
- reset: reset-zynqmp: Removed license text