ZynqMP Linux Reset-controller Driver

Introduction

The ZynqMP reset-controller has the ability to reset lines connected to different blocks and peripheral in the Soc.

This page gives an overview of the ZynqMP reset-controller driver which is available as part of the ZynqMP Linux distribution.
Paths, files, links and documentation on this page are given relative to the Linux kernel source tree.

Below links provide the information about the reset-controller linux framework
http://elixir.free-electrons.com/linux/latest/source/Documentation/devicetree/bindings/reset/reset.txt
http://elixir.free-electrons.com/linux/latest/source/drivers/reset/core.c#L196


HW IP Features.

  • Ability to reset the lines connected to different blocks and peripheral in the Soc

Missing Features, Known Issues and Limitations

  • None

Kernel Configuration

Device Drivers --->[*] Reset Controller Support--->[*] Xilinx ZYNQMP Reset Controller Support



Devicetree

Test procedure



The following commit will give you the better understanding and the exact use case of the reset controller.
https://github.com/Xilinx/linux-xlnx/commit/9b4eecd86677acf0d146fdab97dd5324e8f1b404
The Reset-controller driver itself will not initiate any IP reset request.
The Reset request always initiated by the consumer driver as shown in the above commit id

The below patch created only for testing purpose.
apply the patch 0001-Reset-Added-sysfs-entries-for-zynqmp-reset-controlle.patch
This patch has debug sysfs entry so that the reset controller driver can be tested from user space
1) echo reset_IP_num > /sys/class/reset-mgr/reset ----> It will reset the IP by providing the High to low signal.
2) echo reset_IP_num > /sys/class/reset-mgr/reset_assert ---> it will assert IP by providing the HIGH signal ( the relevant bit is set to High until it receives deassert signal).
3) echo reset_IP_num> /sys/class/reset-mgr/reset_deassert ---> it will deassert IP by providing the LOW signal

Reset_IP_num are available here:
https://github.com/Xilinx/linux-xlnx/blob/master/Documentation/devicetree/bindings/reset/zynqmp-reset.txt

Expected Output

Mainline Status

This driver is in Mainline.

Fixes related to coverity warnings are not yet in mainline (~2 lines)

Change Log

2016.3
Summary:

  • reset: reset-zynqmp: Adding support for Xilinx zynqmp reset controller.

Commits:

  • 930e883 reset: reset-zynqmp: Adding support for Xilinx zynqmp reset controller


2016.4

  • None


2017.1

  • None


2017.2

  • None


2017.3
Summary:

  • zynqmp: Use new firmware.h instead of pm.h

Commits:

  • 5e81ba5zynqmp: Use new firmware.h instead of pm.h


2017.4

  • None


2018.1
Summary:

  • soc: zynqmp: Define EEMI ops structure

  • soc: zynqmp: Use new firmware APIs


Commits:

  • 5e81ba5 soc: zynqmp: Define EEMI ops structure

  • 0b7483c soc: zynqmp: Use new firmware APIs


2018.2

  • None


2018.3

  • None


2019.1

  • Sync Mainline changes

    • reset: reset-zynqmp: Sync Reset Id macro with Mainline
    • reset: reset-zynqmp: Move eemi_ops inside zynqmp_reset_data struct
    • reset: reset-zynqmp: Defer probe if firmware is not ready
    • reset: reset-zynqmp: License fix and copyright update
    • reset: reset-zynqmp: Removed license text

2019.2

  • None

2020.1

  • None

2020.2

Summary:

  • Fix coverity warnings

Commits:

2021.1

Summary:

  • Added support for Versal platform.

Commits:

Related Links

https://github.com/Xilinx/linux-xlnx/blob/master/drivers/reset/reset-zynqmp.c