Linux CAN driver

Introduction

This page gives an overview of Axi Can/ CANPS/CAN FD driver which is available as part of the xilinx Linux distribution or Open source linux as
drivers/net/can/xilinx_can.c

This information corresponds to the CAN driver that is the main branch of the Git tree.
This driver supports both ZYNQ CANPS IP and Soft IP axi_can and axi_canfd.
This driver defines the architecture and features of the Xilinx CAN controller core.

HW/IP Features

  • Conforms to the ISO 11898 -1, CAN 2.0A, and CAN2.0B standards
  • Supports Industrial (I) and Extended TemperatureRange (Q) grade device support
  • Supports both standard (11-bit identifier) andextended (29-bit identifier) frames
  • Supports bit rates up to 1 Mbps
  • Transmit message FIFO with a user-configurable depth of up to 64 messages
  • Transmit prioritization through one High-Priority Transmit buffer
  • Automatic re-transmission on errors or arbitration loss
  • Receive message FIFO with a user- configurable depth of up to 64 messages
  • Acceptance filtering (through a user-configurable number) of up to four acceptance filters
  • Sleep Mode with automatic walk-up
  • Loop Back Mode for diagnostic applications
  • Maskable Error and Status Interrupts
  • Readable Error Counters

Features supported in driver

  • Conforms to the ISO 11898 -1, CAN 2.0A, and CAN2.0B standards
  • Supports Industrial (I) and Extended TemperatureRange (Q) grade device support
  • Supports both standard (11-bit identifier) andextended (29-bit identifier) frames
  • Supports bit rates up to 1 Mbps
  • Transmit message FIFO with a user-configurable depth of up to 64 messages
  • Transmit prioritization through one High-Priority Transmit buffer
  • Automatic re-transmission on errors or arbitration loss
  • Receive message FIFO with a user- configurable depth of up to 64 messages
  • Loop Back Mode for diagnostic applications
  • Maskable Error and Status Interrupts
  • Readable Error Counters

Missing features, Known Issues and Limitations

  • Frame work won't support Acceptance filters
  • Frame work won't support water marking
  • Frame work won't support Multiple RX buffers

Kernel Configuration

Xilinx CAN drivers is not enabled in the current default kernel configuration. The following steps may be used to enable the driver in the kernel configuration.


The driver is available at,
https://github.com/Xilinx/linux-xlnx/blob/master/drivers/net/can/xilinx_can.c

Device Tree

For More details about the device tree bindings doc please refer to the Documentation/devicetree/bindings/net/can/xilinx_can.txt file

Test Procedure

CAN Driver Testing from user space

In order to test Xilinx CAN driver there is user space utilities called can-utils available for the user and user need to cross compile those utilities in order to test
the this driver.

CAN:
Attached the Cross compiled can-utils for the Microblaze and ARM(Cortexa9) architectures.
Microblaze Cross compiled CAN utils:



ARM(ZYNQ) cortexa9 Cross compiled CAN utils:


A53 Cross compiled CAN utils:


CANFD:
Xilinx CANFD hw supports this. The same linux can driver support this can fd feature
But to test this CANFD Support need to download canutils
from https://github.com/linux-can/can-utils

Microblaze Cross compiled CANUtils



ARM(ZYNQ) cortexa9 Cross compiled CAN utils:




To run CAN, use the below command:
1. Set bit-timing
Can supports bitrates upto 1Mb/s. Xilinx CAN h/w and driver supports these bit rates
Note: Triple sampling is not supported by Xilinx CAN H/W.
$ ./ip link set can0 type can bitrate 200000
or
$ ./canconfig can0 bitrate 200000
2. Bring up the device
$ ./ip link set can0 up
or
$ ./canconfig can0 start
3. Bring down the device
$ ./ip link set can0 down
or
$ ./canconfig can0 stop
4. Transmit and receive packets with standard id number
$ ./cansend can0 -i 0x14 <bytes>
$ ./candump can0
5. Transmit and receive packets with extended id number (--loop argument here)
$ ./cansend can0 -i 0x333 <bytes>
$ ./candump can0
6. Loopback mode
$ ./canconfig can0 ctrlmode loopback on
7. Checking link state (checking bitrate/errors/packets)
$ ./ip -d -s link show can0
8. Checking net device state
$ ifconfig can0
9. Getting statistics via proc
$ cat /proc/net/can/stats
10. Socket CAN core uses several filter lists to deliver received CAN frames to CAN protocol modules. These
receive lists, their filters and the count of filter matches can be checked in the appropriate receive list. All entries contain the
device and a protocol module identifier:
$ cat /proc/net/can/rcvlist_all
rcvlist_all - list for unfiltered entries (no filter operations)
rcvlist_eff - list for single extended frame (EFF) entries
rcvlist_err - list for error message frames masks
rcvlist_fil - list for mask/value filters
rcvlist_inv - list for mask/value filters (inverse semantic)
rcvlist_sff - list for single standard frame (SFF) entries

To run CANFD, use the below command:
1. Set bit-timing
Canfd supports two bitrates, one for Arbitration phase and other for Data phase. Xilinx CANFD h/w and driver supports these bit rates
$ ./ip link set can0 type can bitrate 125000 dbitrate 8000000 fd on
2. Bring up the device
$ ./ip link set can0 up
3. Bring down the device
$ ./ip link set can0 down
4. Transmit and receive canfd packets with standard id number
$ ./cansend can0 213##<bytes>
$ ./candump can0
5. Transmit and receive can packets with same controller, since canfd supports backward can also
$ ./cansend can0 123#<bytes>
$ ./candump can0
6. Loopback mode
$ ./ip link set can0 type can bitrate 125000 dbitrate 8000000 fd on looopback on
7. Checking link state (checking bitrate/errors/packets)
$ ./ip -d link show can0
8. Checking net device state
$ ifconfig can0

Binding Tests:
Microblaze:
a. correct binding with
XILINX_CAN e0008000.ps7-can: phy mem:0xe0008000..0xe0008fff
XILINX_CAN e0008000.ps7-can: reg_base=0xf0062000 irq=60 clock=23809523, tx fifo depth:64
b. Incorrect binding - tests suppose to fail
I. missing clocks
II. missing clock-names
III. missing register
IV. missing interrupt parent
V. missing interrupts number

Zynq:
a. correct binding with
b. Incorrect binding - tests suppose to fail (done on dummy nodes)
I. missing clocks
II. missing clock-names
III. missing register
IV. missing interrupt parent
V. missing interrupts number

Expected Output

Mainline status

The current driver availble in the xilinx linux git is in sync with the open source 5.10 kernel driver except for the following
  • can: xilinx_can: Check return value of set_reset_mode
    can: xilinx_can: Add comment for spinlock_t
    can: xilinx_can: Fix alignment match check
    can: xilinx_can: Remove unnecessary braces
    an: xilinx_can: avoid non-requested bus error frames
    can: xilinx_can: fix checkpatch warnings

Change Log

  • 2016.3

    • Summary:
      • None
  • 2016.4

    • Summary:
      • None
  • 2017.1

    • Summary:
      • Add context loss support, needed for PM
    • Commits:

  • 2017.2

    • Summary:
      • Add can: xilinx: fix style issues from checkpatch
      • Add can: xilinx: Enable clocks even when CONFIG_PM is disabled
      • Add can: xilinx: Fix sparse warning in driver
      • Add can: xilinx: fix warnings in the driver
    • Commits

  • 2017.3

    • Summary:
      • Add can: xilinx: fix runtime power management code
    • Commits:

  • 2017.4

    • Summary:
      • None
  • 2018.1

    • Summary:
      • support for remote frame transmission in can
      • defer the probe if clock is not found
    • Commits:
  • 2018.2

    • Summary
      • None
  • 2018.3

    • Summary
      • None
  • 2019.1

    • Summary
      • can: xilinx_can: Fix incorrect assignment of bittiming_const for canfd
      • can: xilinx_can: fix chip_start failure with invalid bus
      • can: xilinx_can: Fix FSR register handling in the rx path
      • can: xilinx_can: Fix the data updation logic for CANFD FD frames
    • Commits:
      • 65e7122Fix incorrect assignment of bittiming_const for canfd
      • 18e565dfix chip_start failure with invalid bus
      • 7f1fe5b:   Fix FSR register handling in the rx path
      • 186ca83Fix the data updation logic for CANFD FD frames

  • 2019.2

    • Summary
      • can: xilinx_can: Fix FSR register FL and RI mask values for canf...
      • can:  xilinx_can: Fix the data phase btr1 calculation
      • can: xilinx_Avoid printing bus clock not found in case of defer
      • can: xilinx_can: Fix the data updation logic for CANFD FD frames
    • Commits:
      • 180d843c can: xilinx_can: Fix FSR register FL and RI mask values for canf...
      • fc03fa30 can: xilinx_can: Fix the data phase btr1 calculation
      • 7b1b5c5f can: xilinx: Avoid printing bus clock not found in case of defer
      • d52eabb7 can: xilinx_can: Fix usage of skb memory 
  • 2020.1

    • summary
      • can: xilinx_can:  Fix missing Rx can packets on CANFD2.0
      • can: xilinx_can: Limit CANFD brp to 2
    • commits
      • bfb35d41Fix missing Rx can packets on CANFD2.0
      • 0cad86e3Limit CANFD brp to 2
  • 2020.2

    • summary
      • can: xilinx_can: avoid non-requested bus error frames
    • Commits

Related Links