The purpose of this page is to describe the Linux SPI driver for Xilinx soft IPs.
This information corresponds to the axi spi and axi quad-spi driver that's in the development branch of the GIT tree.
This driver is also in the master branch, but not updated for device tree there.
It's in the development branch as a patch has been submitted to the mainline kernel so that it works
with the device tree and also finds nodes on the SPI such as an EEPROM.
- Configurable AXI4 interface; when configured with an AXI4-Lite interface the core is backward
compatible with version 1.00 of the core (legacy mode)
- Configurable AXI4 interface for burst mode operation for the Data Receive Register (DRR)
and the Data Transmit Register (DTR) FIFO
- Configurable eXecute In Place (XIP) mode of operation
- Connects as a 32-bit slave on either AXI4-Lite or AXI4 interface
- Configurable SPI modes:
- Standard SPI mode
- Dual SPI mode
- Quad SPI mode
- Programmable SPI clock phase and polarity
- Configurable FIFO depth (16 or 256 element deep in Dual/Quad/Standard SPI mode) and
fixed FIFO depth of 64 in XIP mode
- Configurable Slave Memories in dual and quad modes are: Mixed, Micron, Winbond, and
Spansion (Beta Version)
Missing features, Known Issues and Limitations
SPI may not be enabled in the default kernel configuration. The following steps may be used to enable the driver in the kernel configuration.
Using An SPI EEPROM Driver As A Higher Layer:
There are higher layer drivers that allow the SPI driver to be used to access other devices such as an SPI serial EEPROM.
The following steps may be used to enable the driver in the kernel configuration.
- From the device drivers menu, select SPI support
- Select SPI EEPROMs from most vendors
Adding An SPI EEPROM to the Device Tree
The following example shows adding an SPI EEPROM to a device tree. This example was used to access an SPI EEPROM on the Aardvark board.
The device-tree generator for the EDK does not create the EEPROM device on the SPI bus.
The value of 0 in the reg entry is the chip select for the EEPROM. The value in the spi-max-frequency is the bus frequency. This field is required, but has not been tested with other values.
Adding a flash to the Device tree
The EEPROM driver allows the contents of the EEPROM to be seen in the sys file system at /sys/bus/spi/devices/spi32766.0/eeprom. The file, eeprom, is a file that can be read and written from user space.
If the sys file system is not mounted (no /sys dir), then the following commands will create and mount it.
The following shell commands can view the contents of the eeprom by 1st capturing it and then displaying the file as binary data.
The following command will write "01234567890DEADBEEFCAFE" to the EEPROM.
Using An Aardvark I2C/SPI Activity Board For SPI EEPROM Testing
TotalPhase, the company that sells the Aardvark I2C/SPI test equipment, also sells a small board that we can use for our own testing, independent of the Aardvark. The board has an I2C EEPROM and an SPI EEPROM on it such that it can be connected to an FPGA board pretty easy.http://www.totalphase.com/products/activity_board/http://www.totalphase.com/download/pdf/activity-board-v1.00.pdfhttp://www.totalphase.com/products/split_cable/
The point of this exercise is to have a standard test for the SPI that can be used across all boards.
See the following page, SPI With The Aardvark Board
, for more information on how to do it.
- Handle errors from platform_get_irq
- Handle errors from platform_get_irq
- Add clock adaptation
- Fix the runtime check
- Fixed style issue from check patch
- Fix sparse warnings in driver
- Passed correct structure in pm calls
- Added workaround when startup block is enabled
- Fixed kernel booting issue when startup block is enabled
- Updated axi-qspi controller driver in kernel v5.4 upgrade
- Correct multibyte writes
- Check return value of of_property_read_u32
- Fix incorrect variable type
- Fix type mismatch in xilinx_spi_irq API