| | |
|---|
Yocto | MicroBlaze Zynq-7000 Zynq UltraScale+ MPSoC Zynq UltraScale+ RFSoC Versal
| |
FS-Boot Zynq-7000 FSBL Zynq UltrsScale+ FSBL | MicroBlaze Zynq-7000 Zynq UltraScale+ MPSoC Zynq UltraScale+ RFSoC
| If RSA_EN is not programmed and bh_auth is not enabled in bif, FSBL loads the bin as non-secure bin irrespective of whether the partitions are authenticated or not. FSBL provides a user config: FSBL_PL_LOAD_FROM_OCM_EXCLUDE_VAL which is set to 1 by default. Setting this to 0 will ensure bitstream would be loaded in chunks from OCM even if DDR is present in design, in DDR less designs, bitstream is loaded from OCM irrespective of the flag.
|
PMUFW (Platform Management Unit Firmware) | Zynq UltraScale+ MPSoC Zynq UltraScale+ RFSoC
| |
PLM (Platform Loader and Manager) | | Functional Safety certification and FMEDA support (PLM and Sec libs) Multiboot support at run-time PLM Image Store updates at runtime PLM Size improvements CRC support for IPI in PLM & PSM PLM_SECURE_EXCLUDE to exclude security code PLM Access controls Configuration of EM error actions using error mask instead of error ID. Configuration of multiple errors of same error error at a time. NOC clock gating when NOC is not in use Linux kernel drivers to register and be notified of system errors PSM watchdog/keeepalive check from PLM Features available only in Decoupling workflow: Device capabilities for secure, coherency, virtualization configurations Healthy boot of subsystem Default xPPU/xMPU protections for PMC/PSM Subsystem permissions for access control to devices and other resources
|
Arm Trusted Firmware (ATF) | Zynq UltraScale+ MPSoC Zynq UltraScale+ RFSoC Versal
| Added the error management support. Added the missing IDs for ZynqMP. Created a common macro for CRC checksum. Mark IPI calls secure/non-secure. Add support to reset SGI. Added support for XCK26 silicon ID.
|
U-Boot | MicroBlaze Zynq-7000 Zynq UltraScale+ MPSoC Zynq UltraScale+ RFSoC Versal
| Upgraded U-Boot to mainline 2021.01 zynqmp mmio_read and zynqmp mmio_write commands are available to access secure registers from U-Boot Added Common Clock Framework(CCF) functionality to enable and disable clocks in U-Boot. Added Block protection support for Micron SPI flash devices. Added Support for storing ENV on media which is used for primary bootmode.
|
Device-tree Generation (DTG) | MicroBlaze Zynq-7000 Zynq UltraScale+ MPSoC Zynq UltraScale+ RFSoC Versal
| Added the clock support for axis_switch IP. ZOCL device tree support was added. Cascade mode support for axi intc controllers. For mipi_csi_rx IP the reset_gpios property was added. For mipi_csi_rx IP added the compatible string for backward compatibility. Removed pinctrl properties when IPs gpios are configured as EMIOs. Updated the acpu frequency based on the design. Added the clock wizard IP support for versal. Updated the alias nodes with PS IPs as priority. Removed the clock workaround clk_ignore_unused in DTG. Generate the video_clk as per the design. hdmi_tx: Add the vid-interface property.
|
Linux Kernel and Drivers | MicroBlaze Zynq-7000 Zynq UltraScale+ MPSoC Zynq UltraScale+ RFSoC Versal
| Kernel upgrade to v5.10 version. OSPI Macronix flash part support. DDRC EDAC Linux driver support for Versal using Error Management AXI I2C standard mode read support in Linux driver. Added Linux GPIO driver for ZynqMP mode pins. Added MRMAC one step PTP support and bugfixes for link initialization. Added AXI Ethernet ethtool statistics reporting on AXIDMA and MCDMA.. Added support to load secure bitstream(more specifically a secure PDI that is encrypted with volatile user key). Added support to ensure that existing AXI INTC driver (drivers/irqchip/irq-xilinx-intc.c) can operate as a module when loaded through a DT overlay.
|
OpenAMP and Libmetal | Zynq-7000 Zynq UltraScale+ MPSoC Zynq UltraScale+ RFSoC Versal
| |
VCU (Video Codec Unit) | | Gstreamer version upgraded to 1.16.3 GRAY8/GRAY10 format support is added for VCU encoder/decoder at Gstreamer Dynamic IDR insertion support is added for Pyramidal GOP Added external CRTC (ex: PL video-mixer) support to PS-DP subsystem. Uniform slicetype parameter support is added for VCU encoder Vertical alignment/crop on input buffers is supported for VCU encoder
|
QEMU | MicroBlaze Zynq-7000 Zynq UltraScale+ MPSoC Zynq UltraScale+ RFSoC Versal
| Merge with QEMU 5.1 from mainline Versal: WWDT support Versal: Basic Sysmon support Versal: XRAM and XRAM Controller support Versal: PSM Halt support Versal: CanFD fixes Versal: Improve reset coverage Versal: Add support for direct SMP Linux boots ZU+: zynqmp: Add K26 SOM and Starter-kit virtual boards ZU+: Fix a APU WFI propagation to PMU bug MicroBlaze: Add TrustZone support remote-port: ATS support remote-port: Bus-access device error reporting remote-port: Add an iomem-cache caching memories implemented in SystemC/RTL eMMC Improvements
|
Xen | Zynq UltraScale+ MPSoC Zynq UltraScale+ RFSoC Versal
| Rebased on Xen 4.14 Xen support for dynamic discovery of new PL blocks at runtime Assignment of discovered PL blocks to new Xen Virtual Machines Cache Coloring PV drivers support
|
BSP, Drivers and Libraries | MicroBlaze Zynq-7000 Zynq UltraScale+ MPSoC Zynq UltraScale+ RFSoC Versal
| XilSecure Client support is added for A72/R5 processors Remaining eFuse read/write support Added Environmental monitoring support is XilNvm library before programming eFuses eFuse read/write classification is added for IPI requests in XilSKey library for ZynqMp User key decryption support is added and interface to load user keys is provided by PMC_DATA.CDO Authentication of IHT as AAD Clearing of PUF ID Storing Secure State of Boot in RTCA for run time use KAT for ECDSA P521 curve Checks that encryption key source of metaheader is same as that of PLM Authentication of PLM loadable partitions using ECDSA P521 curve for A-HWRoT boot mode OSPI Macronix flash part support. Added Flash read/write example for QSPI NAND device Added example for SPI SLM9670 TPM device which can perform different tpm2 commands based on user options. Added AXI Timer driver support for Versal platform. Upgraded FreeRTOS to version 10.4.3. Added support to load secure bitstream(more specifically a secure PDI that is encrypted with volatile user key). Baremetal Dhrystone application present in embeddedsw sw_apps has been enhanced to add support for all Xilinx supported platforms/CPUs.
|
AI Engine(AIE) | | Batch processing ( Transaction Mode) AIE resource Manager ( profiling resources) Functional Abstraction Layer for AIE ( AIEFAL) SYSFS for AIE errors and status dump Driver support for Timer Sync
|