Multi-Tile Synchronization - RF DC Evaluation Tool

This page provides a step by step guide to demonstrate Multi-Tile Synchronization (MTS) using the RF DC Evaluation tool and the ZCU208 development kit.

Table of Contents

Introduction

Multi-Tile Synchronization is a major feature of the RFSoC devices and is used in many application. MTS can be demonstrated with the RFDC Evaluation tool and a RFSoC development kit. In this example, we will use the XM650 add-on card, which covers the N79 Band (4700MHz), and the CLK104 add-on card.

ZCU208 Board Setup

As seen in the picture below, the board setup is straight forward.

  1. Plug in the CLK104 and XM650 into the main ZCU208.

  2. The only cabling necessary is the Ethernet and power cable, as seen in the ZCU208 quickstart guide.

CLK104 RF Clock Add-on Card Setup

By default, the CLK104 add-on card is programmed with a DAC and ADC reference clock of 245.76MHz, a SYSREF clock of 7.68MHz, and a PL input clock of 122.88MHz. These frequencies are suitable for this example so no change is necessary. For reference, you can click on “Clock Settings” on the main screen to view the CLK104 output frequencies:

 

For the internal clock distribution, we must select frequencies which respect the clock rules of MTS. The clock involved are: SYSREF, PL input clock, Tile input reference clock, Sampling frequency, AXI stream clocks. All clocks must be an integer multiple of SYSREF. In addition, the PL input clock must be an integer multiple of the AXI Stream clock. To respect these rules, the picture below details the clock distribution settings used in this example:

 

DAC MTS Setup

  1. In the overview tab, click on the MTS button of the DAC tile

  2. Select the MMCM input frequency (PL input clock).

  3. Then click “apply” to register these new settings, followed by “synchronize” to execute the synchronization.

ADC MTS setup

Repeat the previous steps for the ADC synchronization.

  1. In the overview tab, click on the MTS button of the DAC tile

  2. Select the MMCM input frequency (PL input clock).

  3. Then click “apply” to register these new settings, followed by “synchronize” to execute the synchronization.

Generation and Acquisition

The XM650 add-on card contains a bypass filter ~4700MHz, so all DAC signals need to be generated with a single tone at this frequency. The screen shot below shows a multiview of all DACs:

 

We can then visualize the alignment on the ADC side by using the Menu->Windows->Multiview->ADC time domain and “capture” all ADCs:


Related Links

For more information on the ZU49DR silicon used on the ZCU216 board or the ZU48DR used on the ZCU208 board and any other RFSoC silicon visit https://www.xilinx.com/products/silicon-devices/soc/rfsoc.html

For board schematics, BOM lists, user guides, and other documentation, go to the ZCU216 webpage located at https://www.xilinx.com/products/boards-and-kits/zcu216.html and the ZCU208 webpage located at https://www.xilinx.com/products/boards-and-kits/zcu208.html