This page provides details on the 2020.3 (For Versal Adaptive SoC only) release information such as new features and bug fixes for all the Xilinx Open Source Components.

New Features

Note:

Each "Component Name" has a link to respective pages. For more details refer individual pages.

Component Name	Platform/SoC Supported	Feature Description
Yocto	Versal	None
PLM (Platform Loader and Manager)	Versal	None
Arm Trusted Firmware (ATF)	Versal	None
U-Boot	Versal	None
Device-tree Generation (DTG)	Versal	None
Linux Kernel and Drivers	Versal	None
OpenAMP and Libmetal	Versal	None
QEMU	Versal	None
Xen	Versal	None
BSP, Drivers and Libraries	Versal	None
AI Engine(AIE)	*Versal (AI Core Series)**	None

Bug Fixes

Note:

Each "Component Name" has a link to respective pages. For more details refer individual pages.

Component Name	Platform/SoC Supported	Bug Description
Yocto	Versal
PLM (Platform Loader and Manager)	Versal	Fix in DMA write alignment issues in secure boot (authentication) cases Fix to avoid multiboot fallback issues by performing CFU recovery before PL house cleaning Security fix: Added check to verify revoke id from the user before enabling auth JTAG Fix to make sure that NPI Root errors are detected and reported during configuration Removed interrupt enable call which is causing unexpected DMA transfers in SMAP bootmode Fix in secure boot with encryption Validate key source when DEC only efuse bits are set
Arm Trusted Firmware (ATF)	Versal	None
U-Boot	Versal	None
Device-tree Generation (DTG)	Versal	None
Linux Kernel and Drivers	Versal	None
OpenAMP and Libmetal	Versal	None
QEMU	Versal	None
Xen	Versal	None
BSP, Drivers and Libraries	Versal	None

Xilinx Wiki

2020.3 Release Notes for Open Source Components

Table of Contents

New Features

Bug Fixes

Related Links