Versal AI Edge Series VEK280 Evaluation Kit

Versal AI Edge Series VEK280 Evaluation Kit

This is an additional resource for the Versal AI Edge Series VEK280 Evaluation Kit and does not replace the official documentation of the Versal AI Edge Series VEK280 Evaluation Kit on AMD.com.

Table of Contents

Introduction

The VEK280 Evaluation Kit, equipped with the AMD Versal™ AI Edge VE2802 Adaptive SoC, offers AIE-ML and DSP hardware acceleration engines, along with multiple high-speed connectivity options. This kit is optimized for ML inference applications in markets such as automotive, vision, industrial, scientific, and medical.

Getting Started

This section provides the prep-work, board setup and files needed to boot and run a couple of designs on the VEK280 board. You will need to download files and applications to interface to the boards, but will need no installation or knowledge of the AMD tools to run these on the VEK280.

For board setup and configuration, refer to the VEK280 Board User Guide, UG1612 (Note you will need to register for the VEK120 Early Access site to access this link)

Prep Work

You will need a terminal interface such as Tera Term or PuTTY to interface to the UART to boot the VEK280 board. Please download your choice before getting started.

The next step is to download the prebuilt images from the Linux Prebuilt Images wiki page. The PetaLinux BSP will provide a pre-built image that will allow you to boot Linux and interact via a terminal to run some examples.

Board Setup

Board setup is quick and easy, the following are the instructions and diagrams for setup.

Running a design

Use the instructions below to run the design that you have downloaded via the PetaLinux BSP for the VEK280 board, once you have prepared the SD card.

Versal Example Designs

MRMAC Example Design

This section describes the steps to create the example design for MRMAC targeting VEK280.

The MRMAC Design Document explains the steps to create the MRMAC design and run the Software application in Vitis, after configuring the core with 4x10G Wide mode, MAC+PCS, and GTYP at 322.265625 MHz

Example Design and MRMAC Vitis SW have the example MRMAC design and the Software test application respectively. 

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