Versal Targeted Reference Designs(TRDs)
Targeted Reference Designs (TRDs) are built to demonstrate various aspects of the Versal architecture and its functionality with evaluation board interfaces. From machine learning and video processing to integrated PCIe block and 100G Ethernet IP, TRDs are the fastest way to explore the capabilities of Versal devices.
Table of Contents
VCK190 Targeted Reference Designs
Name | Description | Version | License Type |
VCK190 Video and Machine Learning TRD | The video and machine learning TRD demonstrates three platforms with different video sources and sinks (HDMI, MIPI). The platforms capture live video, perform machine learning and vision processing functions, and display it on an HDMI monitor. These TRDs showcase system-level design examples using Scalar Engines, Adaptable Engines, and AI Engines with the associated multimedia software stack. The TRD showcases the recommended tool flow for building the design. | Includes evaluation licenses
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VCK190 Ethernet TRD (Available on GitHub)
| The Ethernet TRD demonstrates a system-level design example that includes Multirate Ethernet MAC (MRMAC) IP (4x 10G/25G) and IEEE Std 1588 precision time protocol (PTP) stamping logic used for synchronizing clocks on high bandwidth networks. The design includes Scalar Engines, Adaptable Engines, and MRMAC (with IEEE Std 1588 time stamping) with associated software stack. The TRD showcases the recommended tool flow for building the design. | Includes evaluation licenses
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Versal Adaptive SoC Restart TRD (Available on GitHub)
| The Versal Adaptive SoC system and subsystem restart targeted reference design (VSSR TRD), also referred to as the Versal Adaptive SoC Restart TRD, demonstrates how to restart various components in the system. It also showcases the liveliness of a subsystem while another subsystem is undergoing restart. The TRD consists of a baseline Vivado design, PetaLinux, Jupyter notebooks, and other software components to demonstrate different restart scenarios. | Includes evaluation licenses
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The Versal Adaptive SoC subsystem restart TRD demonstrates how to restart one processor subsystem without disturbing the other subsystems in the design. The TRD consists of a baseline and compression design, software drivers, PetaLinux, and Jupyter notebooks to demonstrate different restart scenarios. | 2020.2 | No license required |
VMK180 Targeted Reference Designs
Name | Description | Version | License Type |
VMK180 Video Acceleration and PCIe TRD (Available on GitHub) | The Video acceleration and PCIe TRD demonstrates live capture of images over MIPI or video data offload from a x86 host machine over PCIe® to the VMK180 for accelerating video processing functions. The output video is displayed over an HDMI monitor. The design uses Scalar Engines, Adaptable Engines, and integrated PCIe Gen4 with QDMA and associated software stack. The TRD showcases the recommended tool flow for building the design. | Includes evaluation licenses | |
Versal Adaptive SoC Restart TRD (Available on GitHub)
| The Versal Adaptive SoC system and subsystem restart targeted reference design (VSSR TRD), also referred to as Versal Adaptive SoC Restart TRD, demonstrates how to restart various components in the system. It also showcases the liveliness of a subsystem while another subsystem is undergoing restart. The TRD consists of a baseline Vivado design, PetaLinux, Jupyter notebooks, and other software components to demonstrate different restart scenarios. | Includes evaluation licenses
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The Versal Adaptive SoC subsystem restart TRD demonstrates how to restart one processor subsystem without disturbing the other subsystems in the design. The TRD consists of a baseline and compression design, software drivers, PetaLinux, and Jupyter notebooks to demonstrate different restart scenarios. | 2020.2 | No license required |
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