This design note is to document a set of steps in Vitis and PetaLinux that will create a system with Linux on the APU and bare metal on each of the R5s in the RPU of a Versal device (in this example a VCK190). Libmetal will be used to communicate between the APU and RPU.

In this system, the APU will boot first and bring up and initialize each of the R5s. Example applications for the R5s and Linux on the APU will be created to use many features of Libmetal.

The VCK190 and 2023.2 tools are used in this demonstration.
- Vitis Classic is used, not Vitis Unified
The system boots from SD.

Introduction

This demonstration leverages the Versal Libmetal Demo and the Libmetal AMP Demo in (UG1186). In each of those references there is only a single R5 instance running with a single Linux application interacting with it. For this exercise the R5s will operate in split mode with each having its own application. There will be two Linux applications, each paired with an R5 instance.

General Steps

It is assumed that you have an XSA exported from a Vivado project for the VCK190 which incorporates the requirements noted in the Appendix
Create bare metal applications for each of the R5s which use Libmetal and have been configured to run on the respective core.
Create a PetaLinux project which includes Libmetal with a properly configured device tree and make the resulting sysroot available for the creation of the Linux applications.
Create Linux applications which will use Libmetal to communicate with each of the respective R5s.
Integrate the R5 bare metal applications as well as the Linux applications into the Linux image and package the project to be deployed on the target board.
Deploy the packaged project on the VCK190 and exercise the various included Libmetal functions.

Workflow

Vitis Pass 1 : Create a Vitis project for the VCK190 which incorporates Libmetal AMP Demo applications for R5-0 and R5-1.

PetaLinux Pass 1 : Create a PetaLinux project for the VCK190 using its BSP, configure the project, and create a sysroot which can be used in Vitis for the creation of the Linux applications.

Vitis Pass 2 : Create the Libmetal AMP demo Linux applications, configuring them to use the sysroot from the PetaLinux project.

PetaLinux Pass 2 : Integrate the R5 and Linux apps into the Linux image, configure the PetaLinux project, build, and package.

Deploy and Test : Provision the VCK190 to boot into the demo and run the demo.

Vitis Pass 1 and 2 can be merged if PetaLinux Pass 1 is completed first.

Vitis Pass 1

Create the platform for bare metal applications

Launch Vitis in classic mode (vitis --classic on Linux)

Create a Vitis project in a workspace named vitis_prj.

Close the welcome tab.

Select File->New->Platform Project…

Platform Project Name: VCK190_hw
Click Next
Under the tab "Create a new platform from hardware (XSA)' use the
drop down menu to select vck190
Set the Processor to versal_cips_0_pspmc_0_psv_cortexr5_0
Click Finish

Modify the versal_cips_0_pspmc_0_psv_cortexr5_0 Domain.

Use Modify BSP Settings… to add the LibMetal library

Build the platform.

Create bare metal application for R5-0

Select File->New->Application Project…

Click Next
Click Next (use the newly created platform and domain)
Application project name: my-R5-0-app
Click Next
Select Libmetal AMP Demo
Click Finish

Modify the my-R5-0-app application. The changes are to define the shared memory region between R5-0 and the APU (adjusted because another region for the R5-1 and APU will be needed) and to make the print statements easily identifiable to R5-0.

In common.h change

#define SHM_DEV_NAME "3ed80000.shm'
#define SHM_BASE_ADDR 0x3ED800000
xil_printf("\r\nSERVER> " format, ##__V_ARGS__)

To

#define SHM_DEV_NAME "3d000000.shm"
#define SHM_BASE_ADDR 0x3D0000000
xil_printf("\r\nSERVER0> " format, ##__VA_ARGS__)

Build the application by right clicking on it and selecting Build Project.

Create the bare metal application for R5-1

Create a Domain for R5-1.

Select platform.spr in VCK190_hw.

Use the green '+' to add a domain.

Name : R5-1-standalone

Processor : versal_cips_0_pspmc_0_psv_cortexr5_1

OK

Modify the versal_cips_0_pspmc_0_psv_cortexr5_1 domain.

Use Modify BSP Settings… to add the LibMetal library

Build the platform.
Select File->New->Application Project . . .

Click Next

Click Next (use the VCK190_hw platform)

Application project name : my-R5-1-app

Choose the R5-1 processor

Click Next

Select Libmetal AMP Demo

Click Finish

Modify the my-R5-1-app application. The changes are to define the shared memory region between R5-1 and the APU (accounting for the region allocated to R5-0 and the APU) and to make the print statements easily identifiable to R5-1. Additionally, a different IPI channel is being used for the R5-1 communications with the APU than the one for the R5-0 so its corresponding base address, interrupt vector ID, and mask are adjusted accordingly. Finally, a different TTC is used for R5-1 so its corresponding values are modified.

In common.h change

#define SHM_DEV_NAME "3ed80000.shm'
#define SHM_BASE_ADDR 0x3ED800000
xil_printf("\r\nSERVER> " format, ##__V_ARGS__)

#define IPI_DEV_NAME "ff340000.ipi"

#define IPI_BASE_ADDR 0xFF340000

#define IPI_IRQ_VECT_ID 63

#define IPI_MASK 0x20

#define TTC0_BASE_ADDR 0xFF0E0000

#define TTC_DEV_NAME "ff0E0000.ttc"

To

#define SHM_DEV_NAME "3e000000.shm"
#define SHM_BASE_ADDR 0x3E0000000
xil_printf("\r\nSERVER1> " format, ##__VA_ARGS__)

#define IPI_DEV_NAME "ff350000.ipi"

#define IPI_BASE_ADDR 0xFF350000

#define IPI_IRQ_VECT_ID 64

#define IPI_MASK 0x40

#define TTC0_BASE_ADDR 0xFF0F0000

#define TTC_DEV_NAME "ff0F0000.ttc"

Build the application by right clicking on it and selecting Build Project.

PetaLinux Pass 1

Create and configure the PetaLinux project

Create the project using the VCK190 BSP.

petalinux-create -t project -s <>/xilinx-vck190-v2023.2-10140544.bsp -n plnx_prj
cd plnx_prj
petalinux-config -c rootfs

Filesystem Packages->libs->libmetal->[*]libmetal

Filesystem Packages->libs->libmetal->[*]libmetal-demos

Filesystem Packages->misc->libudev->[*]libudev

Filesystem Packages->misc->sysfsutils->[*]libsysfs

Exit all the way out, saving the configuration changes when prompted.

Replace the contents of plnx_prj /project-spec/meta-user/recipes-bsp /device-tree/files/system-user.dtsi with the code shown below.

/include/ "system-conf.dtsi"
/ {
};

/{
        reserved-memory {
                #address-cells = <2>;
                #size-cells = <2>;
                ranges;
                rproc_0_reserved: rproc@3cd00000 {
                        no-map;
                        reg = <0x0 0x3cd00000 0x0 0x80000>;

Xilinx Wiki

Libmetal AMP Demo - Dual R5s on VCK190

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