Zynq UltraScale＋ MPSoC VCU TRD 2019.2 - PCIe

Table of Contents

1 Overview

The primary goal of this Design is to demonstrate the file-based VCU transcode, encode and decode capabilities over PCIe present in Zynq UltraScale+ EV devices.

This design supports the following interfaces:

VCU Codec:

• Video Encode/Decode capability using VCU hard block in PL 
  • AVC/HEVC encoding.
  • Encoder/decoder parameter configuration.

Communication Interface:

• PCIe

Video format:

• NV12
• NV16 (Only for transcode and decode use case)

Supported Resolution:

The table below provides the supported resolution from the command line app only in this design.

√ - Supported
NA – Not applicable
x – Not supported

Hardware Overview

This Design uses the PCI Express (PCIe®) Endpoint block in an x4 Gen3 configuration along with DMA/Bridge Subsystem for PCI Express for data transfers between the host system memory and the Endpoint.

The DMA/Bridge Subsystem for PCI Express provides protocol conversion between PCIe transaction layer packets (TLPs) and AXI transactions. The hardware scatter-gather list (SGL) DMA interface is exercised to handle buffer management at the Endpoint to enable the memory-mapped interface.

The downstream AXI4-Lite slaves include userspace registers, responsible for the handshaking mechanism between host and the endpoint.

In the system to card direction, the DMA block moves data from the host memory to the PL-side through PCIe and then writes the data to PS-DDR via the AXI-MM interface. Then VCU IP reads data from PS-DDR, performs Video encoding/decoding and writes it back to the same memory. Lastly, in card to system direction, DMA reads PS-DDR via the AXI-MM interface and writes to host system memory through PCIe.

Figure 1: VCU PCIe Hardware Block Diagram

Components, Features, and Functions

4-lane integrated PCIe block with a maximum link speed of 8 GT/s (GT/s is Giga transfers per second)

• 128-bit at 250 MHz

 DMA/Bridge Subsystem for PCIe

• AXI Memory-mapped enabled
• One of each DMA Read (H2C) & DMA write (C2H) channels

Apart from PCIe related IPs, the design contains VCU IP.

Software 

The below figure shows the PCIe software block diagram

1.1 Board Setup

Refer below link for Board Setup

• Zynq UltraScale+ MPSoC VCU TRD 2019.2 Board Setup

rdf0428-zcu106-vcu-trd-2019-2
├── apu
│   └── vcu_petalinux_bsp
├── images
│   ├── vcu_10g
│   ├── vcu_audio
│   ├── vcu_hdmi_multistream_xv20
│   ├── vcu_hdmi_rx
│   ├── vcu_hdmi_tx
│   ├── vcu_llp2_hdmi_nv12
│   ├── vcu_llp2_hdmi_nv16
│   ├── vcu_llp2_hdmi_xv20
│   ├── vcu_llp2_sdi_xv20
│   ├── vcu_multistream_nv12
│   ├── vcu_pcie
│   ├── vcu_sdirx
│   ├── vcu_sditx
│   └── vcu_sdi_xv20
├── pcie_host_package
│   ├── COPYING
│   ├── etc
│   ├── include
│   ├── libxdma
│   ├── LICENSE
│   ├── README.md
│   ├── tools
│   └── xdma
├── pl
│   ├── constrs
│   ├── designs
│   ├── prebuild
│   ├── README.md
│   └── srcs
└── README.txt 

The user needs to copy all the files from the $TRD_HOME/images/vcu_pcie/ to FAT32 formatted SD card directory. 

Insert the board into the PCIe slot of the HOST machine and switch onboard. Board bootup will take around 15-secs. 

HOST PACKAGE

The PCIe HOST application(pcie_host_app) supports transcode, encode and decode use cases. The host application will read an input file(.yuv, .mp4, .ts) data from the HOST machine and sends it to the zcu106 board which is connected to the HOST machine PCIe slot as an endpoint device. The data received from the HOST will be processed(transcode, encode, decode) according to provided use case type using VCU hardware and writes the data to the HOST machine in (.ts, .yuv, .mp4) file format.

The files in pcie_host_package directory provides Xilinx PCIe DMA drivers, for example, software, to be used to exercise file transfer over the Xilinx PCIe DMA IP and perform the transcode, encode or decode use case using Xilinx VCU IP on zcu106 board.

Directory and file description:
===============================
- xdma/: This directory contains the Xilinx PCIe DMA kernel module driver files.

- libxdma/: This directory contains support files for the kernel driver module, which interfaces directly with the XDMA IP.

- include/: This directory contains all include files that are needed for compiling drivers.

- etc/: This directory contains rules for the Xilinx PCIe DMA kernel module and software. The files in this directory should be copied to the /etc/directory on your Linux system.

- tools/: This directory contains example application software to exercise the provided kernel module driver and Xilinx PCIe DMA IP. 

Copy the hosting package on to UBUNTU-18.04 machine and run the below commands to Install the XDMA driver and compile the Host application(pcie_host_app).

NOTE: Root permissions will be required to install xdma driver.

$ cd $TRD_HOME/pcie_host_package

$ cd xdma

$ ./run_make.sh

$ cd ../tools

$ make

 xdma0_control : to access XDMA registers

 xdma0_xvc : to access userspace registers from HOST

 xdma0_user : to access AXI-Lite Master interface

 xdma0_bypass : to access DMA-Bypass interface

 xdma0_h2c_0, xdma0_c2h_0: to access each channel

HOST APPLICATION

Run the below command to initiate a file transfer from the HOST machine and transcode, encode or decode it from the ZCU106 device. After running the application on HOST user need to start device application(pcie_transcode) on the zcu106 target to initiate the transfer.

$ ./pcie_host_app -i input_file_name -o output_file_name -u use_case_type -d input_resolution -F fps

The user was given with the below options for transcoding, encoding or decoding the file : 

usage: ./pcie_host_app [OPTIONS]

-i represents input file name.
-o represents output file name.
        Default: out.ts.
-c represents encoder's l2 cache. It's a boolean parameter. Range of this value is [0-1].
       Default:1 [Enable].
-w represents encoder's low bandwidth. It's a boolean parameter. Range of this value is [0-1].
      Default:0 [Disable].
-f represents encoder's filler data. It's a boolean parameter. Range of this value is [0-1].
      Default:0 [Disable].
-r represents encoder's bitrate. Range of this value is [1-60000]. Unit is in Kbps.
      Default:60000.
-g represents encoder's GOP length. Range of this value is [1-1000].
      Default:60.
-b represents encoder's b-frames. Range of this value is [0-4].
      Default:0.
-s represents encoder's slice value. Range of this value is [4-22].
      Default:8.
-q represents encoder's QP mode. Range of this value is [0 or 2]. O stands for uniform and 2 stands for auto.
     Default:2 [auto].
-m represents encoder's rate control mode. Range of this value is [1-2]. 1 stands for VBR and 2 stands for CBR.
      Default:2 [CBR].
-e represents encoder's encoder type. Range of this value is [0-1]. O stands for AVC and 1 stands for HEVC.
      Default:0 [AVC].
-p represents encoder's GOP mode. Range if this value is [0, 3 or 4]: O stands for basic, 3 stands for low-delay-p and 4 stands for low-delay-b.
       Default:0 [BASIC].
-u represents use case type. Range of this value is [0, 1 or 2]: O stands for encode, 1 stands for decode and 2 stands for transcode.
-d represents input resolution. Range of this value is [1920x1080 or 3840x2160]: 1920x1080 represents width x height of input video frame.
-F represents input FPS. Range of this value is [30 or 60]: this parameter is used for encode use case.
-h represents help.
-v (verbose) print usage help and exit

DEVICE APPLICATION

After booting the ZCU106 board with the SD images, to run the transcode, encode or decode the use case first run the host side application mentioned above and run the device application on the zcu106 device with the mentioned commands below. The host application will send file data to the device for transcoding , encoding or decoding it on the ZCU106 device and receives the transcoded, encoded or decoded data and saves it on to the host machine.

pcie_transcode

Zynq UltraScale+ MPSoC VCU TRD 2019.2 - Build Flow

2.3 Optimum VCU Encoder parameters for use-cases:

Quality: Low bitrate AVC encoding:

• Enable profile=high and use qp-mode=auto for low-bitrate encoding use-cases.
• The high profile enables 8x8 transform which results in better video quality at low bitrates.