Xen is a type-1 Hypervisor defined, maintained and provided to the open source community by the Xen Project. Xilinx actively contributes code to the Xen Project to provide Zynq UltraScale+ MPSoC platform support as well as key enhancements which benefit Xilinx customer use-cases.

Xen allows multiple instances of operating system(s) or bare-metal applications to execute on Zynq UltraScale+ MPSoC. Additional information on the Xen hypervisor can be found at the Xen Project Getting Started page.

Xilinx provides within the PetaLinux Tools and also in our Git tree, core elements and example designs to enable usage of Linux + bare-metal system configurations across the processing cores of Zynq UltraScale+ MPSoC. Key components of these example designs are described below in order to assist our customers to configure, build and deploy these basic configurations and to also identify current functionality gaps which may need to be further addressed within the customer's final system architecture.

Xen-Based-System Feature Summary

Xilinx provides reference designs which include core capabilities for Xen-based systems. The table below lists important system features and their status under native Linux (no hypervisor), Linux Dom0 (on Xen), and Linux DomU (on Xen).
Features that are not listed, or indicated as "Roadmap" below are not currently supported by Xilinx.
FeatureNative LinuxLinux Dom0Linux DomUNotesPower Management – various functionsYes2018.32018.3As of 2017.3, some functionality included in Xen
Not fully featured or tested
See Xen sourcesFPGA_manager (write once)YesYesRoadmapSee: FPGA ManagerFPGA_manager (write multiple)2018.1Target: 2018.1RoadmapPartial Reconfiguration2018.2 (non-secure) & 2018.3 (secure) .RoadmapRoadmapRPU life cycle managementYesRoadmapRoadmapDevice shared memory between DomU and RPUYes2018.12018.1OpenAMP RPMsg comms APU/RPUYesRoadmapRoadmapDevice shared memory DomU Linux to DomU Bare-metalN/A2018.12018.1See: Xen Hypervisor Internals
Xen Shared memoryShared cacheable memory DomU to DomUN/ARoadmapRoadmapGPU UsageYesRoadmapRoadmapPL IP UsageYesUsable without limitation if the Xilinx AXI Sideband Format Utility IP is added to the design.
Also usable without the AXI Sideband Format utility within the following conditions:

• Only one PL master IP communicating with guest
• PL master IPs must use guest-dedicated AXI port(s)

Usable without limitation if the Xilinx AXI Sideband Format Utility IP is added to the design.
Also usable without the AXI Sideband Format utility within the following conditions:

• Only one PL master IP communicating with guest
• PL master IPs must use guest-dedicated AXI port(s)

See: Xen and PL MastersPCIe Pass-through to DomUN/ARoadmapRoadmapWarm Reset/RestartYes - under explicit use-casesRoadmapRoadmapLinux Application DebugYes (via TCF)Yes (via JTAG)Yes (via JTAG)https://www.xilinx.com/html_docs/xilinx2017_3/SDK_Doc/SDK_concepts/concept_xen-aware_debug.html
Build kernel with debug symbols enabled.Bare-metal Xen Paravirtual ConsoleN/AN/AN/A - see noteBare-metal DomU has access to Xen PV Consolethe first Xilinx Xen release that makes them available.

Using Xen Hypervisor with Xilinx Releases