This page provides an overview of the 2020.2 version of the Zynq UltraScale+ MPSoC VCU TRD. This TRD is made up of several design modules. A description of the design modules and links to the individual design module pages can be found in the Design Modules below.
This page complements the TRD User Guide: UG1250 [TODO: Need to update for 2020.2]
Table of Contents
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Design Module # | Project Name | TRD Pre-built images | Description |
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1 | vcu_multistream_nv12 | Multi-stream design supporting HDMI-Rx, TPG, MIPI, HDMI-Tx, DP along with showcasing capabilities of VCU | |
2 | vcu_sdi_xv20 | Design showcasing Audio Video Capture and Display through SDI interface along with the capabilities of VCU with PL DDR supporting 4:2:2 10 bit XV20 format encoding from PS DDR and decoding from PL DDR | |
3 | vcu_audio | Design supporting I2S and HDMI Audio with video capture of HDMI-Rx/MIPI-Rx and showcasing capabilities of VCU | |
4 | vcu_10g | Design showcasing Video stream over 10G Ethernet along with the capabilities of VCU | |
5 | vcu_pcie | Design to showcase file transfer from HOST(x86) machine over PCIe interface and encode, decode or transcode it on ZCU106 board having VCU connected as PCIe endpoint and write back the encode, decoded or transcoded data to the HOST machine. | |
6 | vcu_hdr10_hdmi | VCU based HDMI design to showcase encoding with PS DDR and decoding with PL DDR. It supports the reception and insertion of HDR10 static metadata for HDMI and also DCI4K Feature. | |
7 | Xilinx Low Latency PS DDR NV12 HDMI Audio Video Capture and Display | vcu_llp2_hdmi_nv12 | VCU based HDMI audio video design to showcase ultra low latency support using Sync IP, encoding and decoding with PS DDR for NV12 format |
8 | Xilinx Low Latency PL DDR NV16 HDMI Video Capture and Display | vcu_llp2_hdmi_nv16 | VCU based HDMI design to showcase ultra low latency support using Sync IP, encoding with PS DDR and decoding with PL DDR for NV16 format |
9 | Xilinx Low Latency PL DDR XV20 HDMI Video Capture and Display | vcu_llp2_hdmi_xv20 | VCU based HDMI design to showcase ultra low latency support using Sync IP, encoding with PS DDR and decoding with PL DDR for XV20 format |
10 | Xilinx Low Latency PL DDR XV20 SDI Video Capture and Display | vcu_llp2_sdi_xv20 | VCU based SDI design to showcase ultra low latency support using Sync IP, encoding with PS DDR and decoding with PL DDR for XV20 format |
11 | vcu_quad_sensor | VCU based design supporting Avnet Quad Sensor video capture through MIPI CSI2-Rx and display through HDMI-Tx for NV12 format |
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Linux host machine for all tool flow tutorials (seeUG1144 [TODO: Need to update for 2020.2] for detailed OS requirements)
Petalinux Tools [TODO: Need to update for 2020.2] version 2020.2 (see UG1144[TODO: Need to update for 2020.2] for installation instructions)
VIVADO Design suite version 2020.2
Git a distributed version control system
Serial terminal emulator e.g. teraterm
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Connect the Micro USB cable into the ZCU106 Board Micro USB port J83, and the other end into an open USB port on the host PC. This cable is used for UART over USB communication.
Insert the SD card with the images copied into the SD card slot J100. Please find here how to prepare the SD card for specific design.
Set the SW6 switches as shown in the below Figure. This configures the boot settings to boot from SD.
Connect 12V Power to the ZCU106 6-Pin Molex connector.
Connect one end of Display Port (DP) cable to the board’s U129 connector and the other end to DP port of the 4K monitor.
Connect one end of HDMI cable to the board’s P7 stacked HDMI connector (lower port) and another end to HDMI source in case of HDMI design.
Connect one end of HDMI cable to the board’s P7 stacked HDMI connector (upper port) and another end to HDMI monitor in case of HDMI design.
Connect one end of SDI BNC cable to HD-BNC connector (J68) on board and another end to SDI source in case of SDI design.
Connect one end of SDI BNC cable to HD-BNC connector (J10) on board and another end to SDI monitor/HDMI monitor with SDI to HDMI Converter in case of SDI design.
For a USB storage device, connect the USB hub along with the mouse. (Optional)
For SATA storage device, connect SATA data cable to SATA 3.0 port. (Optional).
For MIPI CSI-2, Insert the LI-IMX274MIPI-FMC image sensor daughter card into the FMC0 connector and set VADJ to 1.2V
For MIPI CSI-2, Insert the Avnet Multi-Camera FMC module into the FMC0 connector and set VADJ to 1.2V
Important Note: VADJ on the FMC0 connector must be set to 1.2V. See FMC VADJ Voltage Settings for more information.
Set up a terminal session between a PC COM port and the serial port on the evaluation board (See the Determine which COM to use to access the USB serial port on the ZCU106 board for more details)
Copy the TRD images into the SD card and insert the SD card on the board.
The below images will show how to connect interfaces on the ZCU106 board.
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Download the TRD 2020.2 release package here.
https://www.xilinx.com/membercgi-bin/forms/download/design-license-xef.html?filenamedocs/ctdoc?cid=bigfile;d=rdf0428-zcu106-vcu-trd-2020-2.zip [TODO: Need to update for 2020.2]
4.2 TRD Directory Structure and Package Contents
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