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  • zynqmp-clk-ccf.dtsi has static clock node configuration, if user wants to change any of the clock information update those in system-user.dtsi.
  • Multi concat Interrupt blocks wont be supported by the DTG.
  • DTG doesn't support IP that are packaged in a subsystem(multiple BD's)
  • Interrupt port width more than one wont be supported.
  • When multicore is enabled for the MAC IPs(if the MAC IPs are more than 1) then there is issue with the label in DTG and it fails. But there wont be an issue if the MAC IP is one and multicore is enabled.
  • DTG wont support for generation of private peripheral interrupts(PPI).
  • DTG supports the video pipeline generation based on the internal TRD designs as mentioned in the wiki https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/25329832/Zynq+UltraScale+MPSoC+VCU+TRD+2018.3
  • DTG doesn't support custom IP, For Multimedia use case If there are any custom IPs connected between the video pipeline IPs DTG wont support those, user may need to add the input and output ports.
  • For broadcaster IP the output can connect to multiple output ports and DTG cant know which output port is a valid for the correct pipeline.
  • If there are multiple similar video pipelines in the design user need to add the input and output port information in the nodes. The below wiki gives some info about how to add the input and output ports.
  • DTG doesn't support non memory-mapped IP's.
  • DTG limitation for multimedia IPs

New Features for

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2022.1:


List of drivers supported in the DTG and their bindings in Linux tree

  • can, canfd
Bindings from the Linux tree: https://github.com/Xilinx/linux-xlnx/blob/master/Documentation/devicetree/bindings/net/can/xilinx_can.txt
  • axi_cdma
Bindings from the Linux tree: https://github.com/Xilinx/linux-xlnx/blob/master/Documentation/devicetree/bindings/dma/xilinx/axi-cdma.txt
  • axi_dma
Bindings from the Linux tree: https://github.com/Xilinx/linux-xlnx/blob/master/Documentation/devicetree/bindings/dma/xilinx/axi-dma.txt
  • axi_emc
  • axi_ethernet, axi_10g_ethernet,xxv_ethernet
Bindings from the Linux tree: https://github.com/Xilinx/linux-xlnx/blob/master/Documentation/devicetree/bindings/net/xilinx_axienet.txt
  • axi_gpio
Bindings from the Linux tree: https://github.com/Xilinx/linux-xlnx/commits/master/Documentation/devicetree/bindings/gpio/gpio-xilinx.txt
  • axi_iic
Bindings from the Linux tree: https://github.com/Xilinx/linux-xlnx/blob/master/Documentation/devicetree/bindings/i2c/i2c-xiic.txt
  • axi_pcie,axi_pcie3,xdma
Bindings from the Linux tree: https://github.com/Xilinx/linux-xlnx/blob/master/Documentation/devicetree/bindings/pci/xilinx-pcie.txt
  • axi_perf_mon
Bindings from the Linux tree: https://github.com/Xilinx/linux-xlnx/blob/master/Documentation/devicetree/bindings/uio/xilinx_apm.txt
  • axi_quad_spi
Bindings from the Linux tree: https://github.com/Xilinx/linux-xlnx/blob/master/Documentation/devicetree/bindings/spi/spi-xilinx.txt
  • axi_sysace
  • axi_tft
Bindings from the Linux tree: https://github.com/Xilinx/linux-xlnx/blob/master/Documentation/devicetree/bindings/video/xilinx-fb.txt
  • axi_timebase_wdt
Bindings from the Linux tree: https://github.com/Xilinx/linux-xlnx/blob/master/Documentation/devicetree/bindings/watchdog/of-xilinx-wdt.txt
  • axi_traffic_gen
Bindings from the Linux tree: https://github.com/Xilinx/linux-xlnx/blob/master/Documentation/devicetree/bindings/misc/xilinx-axitrafgen.txt
  • axi_usb2_device
Bindings from the Linux tree: https://github.com/Xilinx/linux-xlnx/blob/master/Documentation/devicetree/bindings/usb/udc-xilinx.txt
  • vcu
Bindings from the Linux tree: https://github.com/Xilinx/linux-xlnx/blob/master/Documentation/devicetree/bindings/soc/xilinx/xlnx%2Cvcu.txt
  • axi_vdma
Bindings from the Linux tree: https://github.com/Xilinx/linux-xlnx/blob/master/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
  • xadc_wiz
Bindings from the Linux tree: https://github.com/Xilinx/linux-xlnx/blob/master/Documentation/devicetree/bindings/iio/adc/xilinx-xadc.txt
  • axi_intc
Bindings from the Linux tree: https://github.com/Xilinx/linux-xlnx/blob/master/Documentation/devicetree/bindings/interrupt-controller/xilinx%2Cintc.txt
  • ddr4,ddr3,mig_7series
  • pr_decoupler
  • usp_rf_data_converter
  • axi_timer
  • tsn_endpoint_ethernet_mac
Bindings from the Linux tree: https://github.com/Xilinx/linux-xlnx/blob/master/Documentation/devicetree/bindings/net/xilinx_tsn.txt
  • axi_uartlite
Bindings from the Linux tree: https://github.com/Xilinx/linux-xlnx/blob/master/Documentation/devicetree/bindings/serial/uartlite.c
  • axi_uart16550
For other IPs DTG will invoke the generic driver.

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Code Block
themeMidnight
cd linux-xlnx/scripts/dtc
make ARCH=arm <devicetree name>.dtb
dtx_diff system1.dtb system2.dtb


Advanced DTG Topics

How to

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generate dfx supported dtsi files (only for versal)

This section explains how to generate the dtsi files that supports dfx flow.

1.clone the device-tree

https://github.com/Xilinx/device-tree-xlnx.git -b xlnx_rel_v2022.1

2.launch xsct

i.xsct % setws <workspace dir name>

ii.xsct % repo -set <above cloned device-tree-xlnx path>

iii.xsct %  platform create -name dev -hw <static xsa path> -rm-hw <rp-rm xsa path> -proc <proc>  -os device_tree

iv.xsct % bsp config dt_overlay true

v.xsct % platform generate

you will find static and partial dtsi files in the <workspace dir>/dev/psv_cortexa72_0/device_tree_domain/bsp/

convert them into dtbo files using the compiling steps.


How to enable DT OVERLAY from DTG

This section only focuses on DTG aspects of devicetree overlays.  For more comprehensive information on using overlays refer to the applicable FPGA Manager driver page.  Links to the applicable page can be found under Linux Drivers.

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