Intc
Introduction
The LogiCORE™ IP AXI Interrupt Controller (INTC) core receives multiple interrupt inputs from peripheral devices and merges them to a single interrupt output to the system processor. The registers used for storing interrupt vector addresses, checking, enabling and acknowledging interrupts are accessed through the AXI4-Lite interface.
Devicetree
axi_intc_1: interrupt-controller@41200000 {
#interrupt-cells = <2>;
compatible = "xlnx,xps-intc-1.00.a";
interrupt-controller ;
reg = <0x41200000 0x10000>;
xlnx,kind-of-intr = <0x1>;
xlnx,num-intr-inputs = <0x3>;
};
Boot log snippets
NR_IRQS:33 /amba_pl/interrupt-controller@41200000: num_irq=3, edge=0x1
References
AXI Interrupt Controller (INTC) v4.1 Product Guide
Cascade Interrupt Controller support in DTG