AXI UART 16550 standalone driver
Introduction
This page gives an overview of UART 16550 driver which is available as part of the Xilinx Vivado and SDK distribution.
The LogiCORE™ IP AXI Universal Asynchronous Receiver Transmitter (UART) 16550 connects to the Advanced
Microcontroller Bus Architecture (AMBA®) AXI and provides the controller interface for asynchronous serial
data transfer. This soft IP core is designed to connect through an AXI4-Lite interface.
Source path for the driver:
https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/uartns550
Table of Contents
uart 16550
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-- Doc - Provides the API and data structure details
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- Examples - Reference application to show how to use the driver APIs and calling sequence
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- Source - Driver source files
Controller Features Supported:
- AXI4-Lite interface for register access and data transfers
- Hardware and software register compatible with all
- standard 16450 and 16550 UARTs
- Supports default core configuration for 9600 baud, 8 bits data length, 1 stop bit and no parity
- Implements all standard serial interface protocols
- 5, 6, 7 or 8 bits per character
- Odd, Even or no parity detection and generation
- 1, 1.5 or 2 stop bit detection and generation
- Internal baud rate generator and separate receiver clock input
- Modem control functions
- Prioritized transmit, receive, line status and modem control interrupts
- False start bit detection and recover
- Line break detection and generation
- Internal loopback diagnostic functionality
- 16 character transmit and receive FIFOs
Driver Supported Features
The UART 16550 Standalone driver support the below things.All Controller Features supported.
Known issues and Limitations
- None.
Test cases
Refer below pah for testing different examples for each feature of the IP.https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/uartns550/examples
ChangeLog
2017.1Summary:
- uartns550: Added xil_printf statement in examples
- uartns550: Updated makefile
- uartns550: Added readme.txt file to generate doxygen for examples
- 35c078f uartns550: Added xil_printf statement in examples
- 1973ac5 uartns550: Updated makefile
- f47abd4 uartns550: Added readme.txt file to generate doxygen for examples
2017.2
Summary:
- uartns550: Added Suffix U for macros in xparameters.h
- cb54089 uartns550: Added Suffix U for macros in xparameters.h
2017.3
- None
2017.4
- None
2018.1
- None
2018.2
- None
2018.3
- None
2019.1
- None
2019.2
- None
2020.1
- Summary
- uartns550: Update the macro names for the DLL and DLM registers
- uartns550: Clean up the options in xuartns550_intr_example
- Commits
2020.2
- Summary
- uartns550: Modify Makefile to support parallel make execution
- Commits