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This page provides an overview of the 2020.1 version of the Zynq UltraScale+ MPSoC Base TRD.  This TRD is made up of several design modules.  A description of the design modules and links to the individual design module pages can be found in the Design Modules below.

This page complements the TRD User Guide: UG1221

Table of Contents

Table of Contents
excludeTable of Contents

Revision History

This wiki page complements the 2020.1 version of the Base TRD. For other versions, refer to the Zynq UltraScale+ MPSoC Base TRD overview page.

Change Log:
  • Update all projects, IPs, and tools versions to 2020.1
  • Various fixes and improvements


The Zynq UltraScale+ MPSoC Base Targeted Reference Design (TRD) is an embedded video processing application running on a combination of APU (SMP Linux), RPU (bare-metal) and PL. A high-level block diagram is shown below.