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This page gives an overview of the bare-metal driver support for the Versal SbSa UART
Table of Contents
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Introduction
The UART controller is a full-duplex asynchronous receiver and transmitter that supports a wide range of programmable baud rates. The server-based system applications (SBSA) functionality is defined by the Arm® architecture. There are two UART controllers, and they are located in the LPD IOP. The UART performs the following: • Serial-to-parallel conversion on data received from a peripheral device • Parallel-to-serial conversion on data transmitted to a peripheral device The software performs reads and writes of data and control/status information via the APB slave interface.
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The source code for the driver is included with the Vitis Unified Software Platform installation, as well as being available in the Xilinx Github repository.
Driver Name | Path in Vitis | Path in Github |
|---|---|---|
uartpsv | <Vitis Install Directory>/data/embedded/XilinxProcessorIPLib/drivers/uartpsv | https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/uartpsv |
Note: To view the sources for a particular release, use the rel-version tag in github. For example, for the 2020.1 release, the proper version of the code is: https://github.com/Xilinx/embeddedsw/tree/xilinx-v2020.1/XilinxProcessorIPLib/drivers/uartpsv
The driver source code is organized into different folders. The table below shows the uartpsv driver source organization.
Directory | Description |
|---|---|
doc | Provides the API and data structure details |
data | Driver .tcl, .yaml and .mdd file |
examples | Example applications that show how to use the driver features |
src | Driver source files, make and cmakelists file |
Note: AMD Xilinx embeddedsw build flow has been changed from 2023.2 release to adapt to the new system device tree based flow. For further information, refer to the wiki link Porting embeddedsw components to system device tree (SDT) based flow
The .yaml(in data folder) and CMakeLists.txt(in src folder) files are needed for the System Device Tree based flow. The Driver .tcl and .mdd files are for the older build flow which will be deprecated in future.
Driver Implementation
For a full list of features supported by this IP, please refer Versal TRM
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Examples Path:
https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/ospipsv/examples
Test Name | Example Source | Description |
|---|---|---|
Uartpsv interrupt example | This example sends and receives data using interrupts. | |
Uartpsv polled example | This example sends and receives data using polling. | |
Uartpsv hello world example | This example transmits “Hello world“ string |
Example Application Usage
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Example Design Architecture
NA
Change Log
2023.2
https://github.com/Xilinx/embeddedsw/blob/xlnx_rel_v2023.2/doc/ChangeLog#L147
2023.1
https://github.com/Xilinx/embeddedsw/blob/xilinx_v2023.1/doc/ChangeLog#L146
2022.2
None
2021.2
None
2021.1
https://github.com/Xilinx/embeddedsw/blob/xilinx_v2021.1/doc/ChangeLog#L353
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