This page provides detailed information related to Design Module 14 - Xilinx Low Latency PL DDR XV20 SDI Video Capture and Display

Table of Contents

1 Overview

This module enables the capture of video from an SDI-Rx subsystem implemented in the PL. The video can be displayed through the SDI-Tx subsystem implemented in the PL. The module can stream-out and stream-in live captured video frames through an Ethernet interface at ultra-low latencies using Sync IP. This module supports multi-stream for XV20 pixel format. In this design, PL_DDR is used for decoding and PS_DDR for encoding so that DDR bandwidth would be enough to support high bandwidth VCU applications requiring simultaneous encoder and decoder operations and transcoding at 4k@60 FPS.

The VCU encoder and decoder operate in slice mode. An input frame is divided into multiple slices (8 or 16) horizontally. The encoder generates a slice_done interrupt at every end of the slice. Generated NAL unit data can be passed to a downstream element immediately without waiting for the frame_done interrupt. The VCU decoder also starts processing data as soon as one slice of data is ready in its circular buffer instead of waiting for complete frame data. The Sync IP does an AXI transaction-level tracking so that the producer and consumer can be synchronized at the granularity of AXI transactions instead of granularity at the video buffer level. Sync IP is responsible for synchronizing buffers between Capture DMA and VCU encoder as both works on the same buffer.

The capture element (FB write DMA) writes video buffers in raster-scan order. SyncIP monitors the buffer level while the capture element is writing into DRAM and allows the encoder to read input buffer data if the requested data is already written by DMA, otherwise it blocks the encoder until DMA completes its writes. On the decoder side, the VCU decoder writes decoded video buffer data into DRAM in block-raster scan order and displays reads data in raster-scan order. To avoid display under-run problems, the software ensures a phase difference of "~frame_period/2", so that decoder is ahead compared to display.

This design supports the following video interfaces:

Sources:

• SDI-Rx capture pipeline implemented in the PL.

• Stream-In from network or internet.

Sinks:

• SDI-Tx display pipeline implemented in the PL.

VCU Codec:

• Video Encode/Decode capability using VCU hard block in PL.

  • AVC/HEVC encoding

  • Encoder/decoder parameter configuration.

Video format:

• XV20

Supported Resolution:

The table below provides the supported resolution from command line app only in this design.

√ - Supported
NA – Not applicable

The below table gives information about the features supported in this design. 

The below figure shows the Xilinx Low-latency PL DDR SDI design hardware block diagram.

Open

The below figure shows the Xilinx Low-latency PL DDR SDI design software block diagram.

Open

1.1 Board Setup

Refer below link for Board Setup

• Zynq UltraScale+ MPSoC VCU TRD 2020.1 Board Setup

1.2 Run Flow

The TRD package is released with the source code, Vivado project, Petalinux BSP, and SD card image that enables the user to run the demonstration. It also includes the binaries necessary to configure and boot the ZCU106 board. Prior to running the steps mentioned in this wiki page, download the TRD package and extract its contents to a directory referred to as TRD_HOME, which is the home directory.

• Refer Section 4.1 : Download the TRD of Zynq UltraScale+ MPSoC VCU TRD 2020.1 wiki page to download all TRD contents.

TRD package contents are placed in the following directory structure. The user needs to copy all the files from the $TRD_HOME/images/vcu_llp2_sdi_xv20 to FAT32 formatted SD card directory.

TRD package contents specific to VCU Xilinx Low Latency PL DDR XV20 SDI design are placed in the following directory structure.

Configuration files (input.cfg) for various resolutions are placed in the following directory structure in /media/card.

1.2.1 GStreamer Application (vcu_gst_app)

The vcu_gst_app is a command-line multi-threaded Linux application. The command-line application requires an input configuration file (input.cfg) to be provided in the plain text.

Run below modetest command to set CRTC configurations for 4Kp60:

Run below modetest command to set CRTC configurations for 4Kp30:

Run below modetest command to set CRTC configurations for 4Kp59.94:

Run below modetest command to set CRTC configurations for 4Kp29.97

Execution of the application is shown below:

Example:

4kp60 XV20 HEVC_25Mbps Display Pipeline execution.

4kp60 XV20 HEVC_25Mbps low-delay-p Stream-out Pipeline execution.

4kp60 XV20 HEVC_HIGH Stream-in Pipeline execution

To measure the latency of the pipeline, run the below command. The latency data is huge, so dump it to a file.

Refer below link for detailed run flow steps

• Zynq UltraScale+ MPSoC VCU TRD 2020.1 - Run Flow

1.3 Build Flow

Refer below link for detailed build flow steps

• Zynq UltraScale+ MPSoC VCU TRD 2020.1 - Build Flow

2 Other Information

2.1 Known Issues

• For VCU related known issues please refer: PetaLinux 2020.1 - Product Update Release Notes and Known Issues

• For VCU related known issues please refer AR# 66763: LogiCORE H.264/H.265 Video Codec Unit (VCU) - Release Notes and Known Issues and Xilinx Zynq UltraScale+ MPSoC Video Codec Unit.

• Design has a negative slack of WNS around -50 ps . However it does not affect the functionality of the design in the long run also and will be fixed in next release.

2.2 Limitations

• For VCU related limitations please refer: PetaLinux 2020.1 - Product Update Release Notes and Known Issues and PG252

• For VCU related known issues please refer AR# 66763: LogiCORE H.264/H.265 Video Codec Unit (VCU) - Release Notes and Known Issues and Xilinx Zynq UltraScale+ MPSoC Video Codec Unit.

2.3 Optimum VCU Encoder parameters for use-cases

Video streaming:

• Video streaming use-case requires very stable bitrate graph for all pictures

• It is good to avoid periodic large Intra pictures during the encoding session

• Low-latency rate control (hardware RC) is the preferred control-rate for video streaming, it tries to maintain equal amount frame sizes for all pictures.

• Good to avoid periodic Intra frames instead use low-delay-p (IPPPPP…)

• VBR is not a preferred mode of streaming

Performance: AVC Encoder settings:

• It is preferred to use 8 or higher slices for better AVC encoder performance

• AVC standard does not support Tile mode processing which results in the processing of MB rows sequentially for entropy coding.

Quality: Low bitrate AVC encoding:

• Enable profile=high and use qp-mode=auto for low-bitrate encoding use-cases

• The high profile enables 8x8 transform which results In better video quality at low bitrate

3 Appendix A - Input Configuration File (input.cfg)

The example configuration files are stored at /media/card/config/ folder.

Common Configuration:
It is the starting point of common configuration.

Num of Input:
Options: 1

Output:
Select the video interface.
Options: SDI

Out Type:
Options: display and stream

Display Rate:
Pipeline frame rate.
Options: 30 FPS or 60 FPS for each stream.

Exit:
It indicates to the application that the configuration is over.

Input Configuration:
It is the starting point of the input configuration.

Input Num:
Starting N^th input configuration.
Options: 1

Input Type:
Input source type.
Options: SDI

Raw:
To tell the pipeline is processed or pass-through.
Options: False

Width:
The width of the live source.
Options: 3840, 1920

Height:
The height of the live source.
Options: 2160, 1080

Format:
The format of input data.
Options: XV20

Enable LLP2:
To enable LLP2 use-case.
Options: True

Exit:
It indicates to the application that the configuration is over.

Encoder Configuration:
It is the starting point of encoder configuration.

Encoder Num:
Starting N^th encoder configuration.
Options: 1, 2

Encoder Name:
Name of the encoder.
Options: AVC, HEVC

Profile:
Name of the profile.
Options: high for AVC and main for HEVC.

Rate Control:
Rate control options.
Options: low_latency.

Filler Data:
Filler Data NAL units for CBR rate control.
Options: False

QP:
QP control mode used by the VCU encoder.
Options: Uniform, Auto

L2 Cache:
Enable or Disable L2Cache buffer in encoding process.
Options: True, False

Latency Mode:
Encoder latency mode.
Options: sub_frame

Low Bandwidth:
If enabled, decrease the vertical search range used for P-frame motion estimation to reduce the bandwidth.
Options: True, False

Gop Mode:
Group of Pictures mode.
Options: Basic, low_delay_p, low_delay_b

Bitrate:
Target bitrate in Kbps
Options: 1-25000

B Frames:
Number of B-frames between two consecutive P-frames
Options: 0

Slice:
The number of slices produced for each frame. Each slice contains one or more complete macroblock/CTU row(s). Slices are distributed over the frame as regularly as possible. If slice-size is defined as well more slices may be produced to fit the slice-size requirement.
Options:
4-22 4Kp resolution with HEVC codec
4-32 4Kp resolution with AVC codec
4-32 1080p resolution with HEVC codec
4-32 1080p resolution with AVC codec

GoP Length:
The distance between two consecutive I frames
Options: 1-1000

GDR Mode:
It specifies which Gradual Decoder Refresh(GDR) scheme should be used when gop-mode = low_delay_p
Options: Horizontal, Vertical, Disabled

Entropy Mode:
It specifies the entropy mode for H.264 (AVC) encoding process
Options: CAVLC, CABAC, Default

Max Picture Size:
It is used to curtail instantaneous peak in the bit-stream. When it is enabled, max-picture-size value is calculated and set with 10% of AllowedPeakMargin.
i.e. max-picture-size = (TargetBitrate / FrameRate) * 1.1
Options: TRUE, FALSE

Preset:
Options: Custom

Exit
It indicates to the application that the configuration is over.

Streaming Configuration:
It is the starting point of streaming configuration.

Streaming Num:
Starting N^th Streaming configuration.
Options: 1

Host IP:
The host to send the packets to
Options: 192.168.25.89 or Windows PC IP

Port:
The port to send the packets to
Options: 5004, 5008, 5012 and 5016

Exit
It indicates to the application that the configuration is over.

Trace Configuration:
It is the starting point of trace configuration.

FPS Info:
To display fps info on the console.
Options: True, False

APM Info:
To display APM counter number on the console.
Options: True, False

Pipeline Info:
To display pipeline info on the console.
Options: True, False

Exit
It indicates to the application that the configuration is over.

4 Appendix B - SDI-Rx/Tx Link-up and GStreamer Commands

This section covers configuration of SDI-Rx using media-ctl utility and SDI-Tx using modetestutility, along with demonstrating SDI-Rx/Tx link-up issue and steps to switch resolution. It also contains sample Gstreamer SDI XV20 Xilinx’s Ultra Low-Latency and Video pipelines for Display, Stream-In and Stream-Out use-cases.

• SDI source can be locked to any resolution. Run the below command for all media nodes to print media device topology where mediaX represents different media nodes. In the topology, log look for the v_smpte_uhdsdi_rx_ss string to identify the SDI input source media node.

• To check the link status, resolution, and video node of the SDI input source, run below media-ctl command where mediaX indicates media node for the SDI input source. When SDI source is connected to 4KP60 resolution, it shows:

• When HDMI source is connected to 4Kp60 resolution, it shows as below:

• When the SDI source is not connected, it shows:

• Follow the below steps to switch the SDI-Rx resolution from 1080p60 to 4Kp60.

  • Check current SDI Input Source Resolution (1080p60) by following the above-mentioned steps.

  • Run vcu_gst_app for current SDI resolution (1080p60) by executing the following command.

Below configurations needs to be set in input.cfg for SDI-1080p60.

• Change Resolution of SDI Input Source from 1080p60 to 4Kp60 by following below steps.

  • Set the SDI source resolution to 4Kp60 (Homepage → Settings → Display & Sound → Resolution → change to 4Kp60).

  • Save the configuration to take place the change.

• Verify the desired SDI  Input Source Resolution (4Kp60) by following the above-mentioned steps.

• If SDI-Tx link-up issue is observed after Linux booting, use the following command to get the TPG screen on SDI-Tx.

• The table below lists the parameters of the pixel format.

• Run the following gst-launch-1.0 command to display XV20 video on SDI-Tx using low-latency(LLP1) GStreamer serial pipeline (capture → encode → decode → display)

• Run the following gst-launch-1.0 command to display XV20 video on SDI-Tx using Xilinx’s ultra Low-Latency(LLP2) GStreamer serial pipeline (capture → encode → decode → display)

• Run the following gst-launch-1.0 command to stream-out XV20 video using low-latency(LLP1) GStreamer pipeline. Here, 192.168.25.89 is host/client IP address and 5004 is port number.

• Run the following gst-launch-1.0 command to display XV20 stream-in video on SDI-Tx using low-latency(LLP1) GStreamer pipeline. Where, 5004 is port number.

• Run the following gst-launch-1.0 command to stream-out XV20 video using Xilinx’s ultra low-latency(LLP2) GStreamer pipeline. Here 192.168.25.89 is host/client IP address and 5004 is port number.

• Run the following gst-launch-1.0 command to display XV20 stream-in video on SDI-Tx using Xilinx’s ultra low-latency(LLP2) GStreamer pipeline. Where, 5004 is port number.