Zynq UltraScale+ MPSoC VCU TRD 2020.1 - PL DDR HDMI Video Capture and Display

Owned by Ronak Shah (Unlicensed)
Last updated: Sept 18, 2020 by Sunil Vaghela
17 min read

This page provides all the information related to Design Module 10 - VCU TRD PL DDR HDMI design.

Table of Contents

1 Overview

This module enables the capture of video from an HDMI-Rx Subsystem implemented in the PL. The video can be displayed through HDMI-Tx through the PL and recorded in SD cards or USB/SATA drives. The module can Stream-in or Stream-out encoded data through an Ethernet interface. This module supports single-stream and multi-stream for XV20 format. It also supports DCI 4k (4096 x 2160) resolution at 60 FPS.

This is the new design approach proposed to use PL_DDR for decoding and PS_DDR for encoding so that DDR bandwidth would be enough to support high bandwidth VCU applications requiring simultaneous encoder and decoder operations and transcoding at 4k@60 FPS. This approach makes the most effective use of limited AXI4 read/write issuance capability in minimizing latency for the decoder. DMA buffer sharing requirements determine how capture, display, and intermediate processing stages should be mapped to the PS or PL DDR.

This design supports the following video interfaces:
Sources:

  • HDMI-Rx capture pipeline implemented in the PL.

  • File source (SD card, USB storage, SATA hard disk).

  • Stream-In from network or internet.

Sinks:

  • HDMI-Tx display pipeline implemented in the PL.

VCU Codec:

  • Video Encode/Decode capability using VCU hard block in PL 

    • AVC/HEVC encoding

    • Encoder/decoder parameter configuration.

Video format:

  • XV20

Supported Resolution:

The table below provides the supported resolution from the command line app only in this design.

Resolution

Command Line

Single Stream

Multi-stream

DCI-4kp60

√

NA

4kp60

√

NA

4kp30

√

√ (Max 2)

1080p60

√

√ (Max 4)

√ - Supported
NA – Not applicable
x – Not supported

The below table gives information about the features supported in this design. 

Pipeline

Input source

Format

Output Type

Resolution

VCU codec

Pipeline

Input source

Format

Output Type

Resolution

VCU codec

Serial pipeline

HDMI-Rx

XV20

HDMI-Tx

DCI-4kp60/4kp60/4kp30/1080p60

HEVC/AVC

Record/Stream-Out pipeline

HDMI-Rx

XV20

File Sink/ Stream-Out

DCI-4kp60/4kp60/4kp30/1080p60

HEVC/AVC

File/Streaming Playback pipeline

File Source/ Stream-In

XV20

HDMI-Tx

DCI-4kp60/4kp60/4kp30/1080p60

HEVC/AVC


The below figure shows the PL DDR HDMI design hardware block diagram.

 

The below figure shows the PL DDR HDMI design software block diagram.

1.1 Board Setup

Refer below link for Board Setup

1.2 Run Flow

The TRD package is released with the source code, Vivado project, Petalinux BSP, and SD card image that enables the user to run the demonstration. It also includes the binaries necessary to configure and boot the ZCU106 board. Prior to running the steps mentioned in this wiki page, download the TRD package and extract its contents to a directory referred to as TRD_HOME which is the home directory.

TRD package contents are placed in the following directory structure. The user needs to copy all the files from the $TRD_HOME/images/vcu_hdmi_multistream_xv20/ to FAT32 formatted SD card directory.

rdf0428-zcu106-vcu-trd-2020-1 ├── apu │   └── vcu_petalinux_bsp ├── images │   ├── vcu_10g │   ├── vcu_audio │   ├── vcu_hdmi_multistream_xv20 │   ├── vcu_hdmi_rx │   ├── vcu_hdmi_tx │   ├── vcu_llp2_hdmi_nv12 │   ├── vcu_llp2_hdmi_nv16 │   ├── vcu_llp2_hdmi_xv20 │   ├── vcu_llp2_sdi_xv20 │   ├── vcu_multistream_nv12 │   ├── vcu_pcie │   ├── vcu_sdirx │   ├── vcu_sditx │   └── vcu_sdi_xv20 ├── pcie_host_package │   ├── COPYING │   ├── include │   ├── libxdma │   ├── LICENSE │   ├── readme.txt │   ├── RELEASE │   ├── tests │   ├── tools │   └── xdma ├── pl │   ├── constrs │   ├── designs │   ├── prebuild │   ├── README.md │   └── srcs └── README.txt

TRD package contents specific to VCU PL DDR HDMI design are placed in the following directory structure.

rdf0428-zcu106-vcu-trd-2020-1 ├── apu │   └── vcu_petalinux_bsp │   └── xilinx-vcu-zcu106-v2020.1-final.bsp ├── images │   ├── vcu_hdmi_multistream_xv20 │   │   ├── autostart.sh │   │   ├── BOOT.BIN │   │   ├── boot.scr │   │   ├── config │   │   ├── image.ub │   │   ├── system.dtb │   │   └── vcu ├── pcie_host_package ├── pl │   ├── constrs │   ├── designs │   │   ├── zcu106_plddr_hdmi │   ├── prebuild │   │   ├── zcu106_plddr_hdmi │   ├── README.md │   └── srcs │   ├── hdl │   └── ip └── README.txt

Configuration files(input.cfg) for various resolutions are placed in the following directory structure in /media/card.

config ├── 2-4kp30 │   ├── Display │   ├── Record │   ├── Stream-in │   └── Stream-out ├── 4-1080p60 │   ├── Display │   ├── Record │   ├── Stream-in │   └── Stream-out ├── 4kp60 │   ├── Display │   ├── Record │   ├── Stream-in │   └── Stream-out ├── DCI-4kp60 │   ├── Display │   ├── Record │   ├── Stream-in │   └── Stream-out └── input.cfg

1.2.1 GStreamer Application (vcu_gst_app)

The vcu_gst_app is a command-line multi-threaded Linux application. The command-line application requires an input configuration file (input.cfg) to be provided in plain text.

Run below modetest command to set CRTC configurations for DCI-4kp60:

Run below modetest command to set CRTC configurations for 4kp60:

Run below modetest command to set CRTC configurations for 4kp30:

Execution of the application is shown below:

Example:

4kp60 XV20 HEVC_HIGH Display Pipeline execution

4kp60 XV20 HEVC_HIGH Record Pipeline execution

4kp60 XV20 HEVC_HIGH Stream-out Pipeline execution

4kp60 XV20 HEVC_HIGH Stream-in Pipeline execution

Make sure HDMI-Rx should be configured to 4kp60 mode

To measure the latency of the pipeline, run the below command. The latency data is huge, so dump it to a file.

Refer below link for detailed run flow steps

1.3 Build Flow

Refer below link for detailed build flow steps

2 Other Information

2.1 Known Issues

2.2 Limitations

2.3 Optimum VCU Encoder parameters for use-cases.

Video streaming:

  • Video streaming use-case requires a very stable bitrate graph for all pictures.

  • It is good to avoid periodic large Intra pictures during the encoding session

  • Low-latency rate control (hardware RC) is the preferred control-rate for video streaming, it tries to maintain equal amount frame sizes for all pictures.

  • Good to avoid periodic Intra frames instead use low-delay-p (IPPPPP…)

  • VBR is not a preferred mode of streaming.

Performance: AVC Encoder settings:

  • It is preferred to use 8 or higher slices for better AVC encoder performance.

  • AVC standard does not support Tile mode processing which results in the processing of MB rows sequentially for entropy coding.

Quality: Low bitrate AVC encoding:

  • Enable profile=high and use qp-mode=auto for low-bitrate encoding use-cases.

  • The high profile enables 8x8 transform which results in better video quality at low bitrates.

2.4 Max Bit-rate Benchmarking

The following tables summarize the maximum bit rate achievable for 3840x2610p60 resolution, XV20 pixel format at GStreamer level. The maximum supported target bit rate values vary based on what elements and type of input used in the pipeline.

Maximum Bit Rate support for Record Use case with 4kp60 resolution

The table below provides Encoder Maximum Bit Rate Tests with XV20 format and Variable Rate Control Mode.

Video Recording ( Live video capture → VCU encoder → parser → muxer → filesink )

Format 

Codec

Entropy Mode

Rate Control Mode

B-Frames = 4

DDR Mode

Max Target Bitrate



4:2:2, 10 bit


H.264 (AVC)

CABAC