The purpose of this page is to describe the Xilinx DisplayPort 1.4 FMC Linux driver to be used with the Xilinx DisplayPort 1.4 Subsystem IPs. For more information on the IP see the product guides PG299 and PG300.

Table of Contents

Introduction

The DisplayPort 1.4 Video FMC Card has 2 daughter card slots for Source and Sink connection cards. It uses a MegaChip MCDP6000 retimer chip for the sink side and a TI SN65DP141 redriver chip for the source side, and supports 4 lanes of 1.62Gbps, 2. 7Gbps 5. 4Gbps, and 8. 1Gbps. More information on the FMC card can be found on the manufacture TED’s site.

This DisplayPort 1.4 FMC card contains several I2C programmable devices. These devices can be mastered by either dedicated I2C pins of the FMC or I/O pins of the FMC. Below is a table of I2C slave devices and their addresses. Programming these devices is required for the DP 1.4 video solution to operate properly.

Block diagram for DisplayPort signal path on FMC

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Figure 1 - Block diagram for DP signal path

External view of the FMC card

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Figure 2 - FMC Card Top view

Xilinx Video FMC driver overview

Xilinx Video FMC driver is the first driver which needs to be probed among the other drivers (DP 1.4 Rx driver, DP1.4 Tx driver ,Video PHY Contro