This page provides all the information related to Design Module 1 - VCU TRD Muti Stream design.

Table of Contents

1 Overview

The primary goal of this Design is to demonstrate the capabilities of VCU hard block present in Zynq UltraScale+ EV devices. The TRD will serve as a platform to tune the performance parameters of VCU and arrive at optimal configurations for encoder and decoder blocks. This module supports seven hdmi video streams using AXI4 Stream Broadcaster IP at capture side and eight video streams using mixer at display side for NV12 pixel format.

This design supports the following video interfaces:

Sources:

• Test pattern generator (TPG) implemented in the PL

• HDMI-Rx capture pipeline implemented in the PL

• MIPI CSI-2 Rx capture pipeline implemented in the PL

• File source (SD card, USB storage, SATA hard disk)

• Stream-In from network or internet

Sinks:

• DP-Tx display pipeline in the PS

• HDMI-Tx display pipeline implemented in the PL

VCU Codec:

• Video Encode/Decode capability using VCU hard block in PL

  • AVC/HEVC encoding

  • Encoder/decoder parameter configuration.

  • Demonstrate the multi-stream capability of VCU at 4K 60 Hz throughput

Streaming Interfaces:

• 1G Ethernet PS GEM 

Video format:

• NV12

This design demonstrates the multi-stream capability of VCU at 4K 60 Hz throughput.

• Supports 2-4Kp30 multi-stream feature with any 2 of HDMI-Rx, TPG, and MIPI as the input source and HDMI-Tx as display pipeline.

• Supports 4-1080p60 multi-stream feature with 3 HDMI-Rx and 1 MIPI as the input source and HDMI-Tx as display pipeline.

• Supports 8-1080p30 multi-stream feature with 7 HDMI-Rx and 1 MIPI as the input source and HDMI-Tx as display pipeline.

Other features:

• This design supports 8 channel memory-based SCD(Scene Change Detection) IP. SCD can be enabled or disabled through configuration.

Supported Resolution:

The table below provides the supported resolution from GUI and command-line app in this design.