Zynq UltraScale＋ MPSoC Power Management - ZCU102 SW Design Examples

Zynq UltraScale+ MPSoC Power Management - ZCU102 Software Design Examples

This page provides some power management software design examples that can be implemented on the ZCU102 development board.

Before You Start

Prerequisites

You have a ZCU102 development board.
You have installed the Vivado Design Suite (2018.1 release).
You have used the SDK to build. load and run custom BSP applications (e.g. FSBL, PMU Firmware, etc.)
You have installed Petalinux (2018.1 release).
You have used PetaLinux to customize, build and boot Linux.

Tips

Refer to UG1137 "Zynq UltraScale+ MPSoC Software Developer Guide" Chapter 9 for more information about power management APIs.
See here on how to generate the Config Object file.
Refer to UG1209 "Zynq UltraScale+ MPSoC: Embedded Design Tutorial" for more details.
Google "Xilinx UGXXXX" to find the latest version of the Xilinx document.

Getting Started - Hello World

This is an empty application that prints "Hello World!" to the UART. Please use this as a starting point for creating new RPU applications for other design examples provided here.
Example details can be found at PM Hello World.

More Design Examples

Deep Sleep - Lowest power mode while ZU+ can still wake up on its own wake-up sources.
Deep Sleep with Periodic Wake-up - Switch between Deep Sleep and running periodically.
Deep Sleep with PS SysMon in Sleep Mode - Put PS SysMon in sleep mode during Deep Sleep.
Minimal RPU Applications - Small R5 applications to release all nodes and suspend itself.
Typical Power States - Transitioning between typical power states.
Power Off Suspend - Suspend/resume with full SoC power off (except for battery-backed RAM).