Zynq UltraScale+ MPSoC Power Management - ZCU102 SW Design Examples

This page provides some power management software design examples that can be implemented on the ZCU102 development board.

Table of Contents

Before You Start


  1. You have a ZCU102 development board.
  2. You have installed the Vivado Design Suite (2018.1 release).
  3. You have used the SDK to build. load and run custom BSP applications (e.g. FSBL, PMU Firmware, etc.)
  4. You have installed Petalinux (2018.1 release).
  5. You have used PetaLinux to customize, build and boot Linux.


  • Refer to UG1137 "Zynq UltraScale+ MPSoC Software Developer Guide" Chapter 9 for more information about power management APIs.
  • See here on how to generate the Config Object file.
  • Refer to UG1209 "Zynq UltraScale+ MPSoC: Embedded Design Tutorial" for more details.
  • Google "Xilinx UGXXXX" to find the latest version of the Xilinx document.


The Zynq UltraScale+ MPSoC controls the external power supplies to the Full Power Domain and the Programmable Logic Domain via the GPI1[0] and GPI1[1] signals.  These signals must be mapped to their MIO pins in Vivado PCW.  See TRM chapter on "Platform Management Unit" for details.

Getting Started - Hello World

This is an empty application that prints "Hello World!" to the UART. Please use this as a starting point for creating new RPU applications for other design examples provided here.
Example details can be found at PM Hello World.

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