Introduction
This page gives an overview of sysmonpsu driver which is available as part of the Xilinx Vivado and SDK distribution.
A Zynq® UltraScale+™ MPSoC has one system monitoring (SYSMON) block in both the PS and the PL. The SYSMON block has a register interface that can be used to configure the
block and provide a capability of monitoring on and off chip voltages as well as junction temperature. The SYSMON block also has a built-in alarm generation logic that can be used
to interrupt the processor based on certain alarm conditions. For example, shutting down the system, based on an over-temperature (OT) alarm generated from the SYSMON block.
The PL SYSMON block has DRP, JTAG and I2C interfaces to enable monitoring from the external master and the capability to interface with an external power management bus
(PMBus) device. The PS SYSMON block has a built-in logic that enable access to the PS and PL SYSMON blocks.
Driver Sources
The source code for the driver is included with the Vitis Unified Software Platform installation, as well as being available in the Xilinx Github repository.
Driver Name | Path in Vitis | Path in Github |
|---|---|---|
sysmonpsu | <Vitis Install Directory>/data/embedded/XilinxProcessorIPLib/drivers/sysmonpsu_v2_7 | https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/sysmonpsu |
Note: To view the sources for a particular release, use the rel-version tag in github. For example, for the 2020.1 release, the proper version of the code is:
https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/sysmonpsu
The driver source code is organized into different folders. The table below shows the <Driver Name> driver source organization.
Directory | Description |
|---|---|
doc | Provides the API and data structure details |
data | Driver .tcl and .mdd file |
examples | Example applications that show how to use the driver features |
src | Driver source files |
PS SYSMON Features
The PS-SYSMON block, provides the following features.
Remote temperature sensor capability
ADC supports 10-bit resolution with 1 MSPS sampling frequency
1v range with a common-mode, unipolar and bipolar
One, dedicated, low input resistance differential channel
16 auxiliary differential channels.
Supply monitor, multiple input channels
Stand-alone measurement control system including sequencing, alarms, averaging and min/max
Multi-rate sequencing capability operational on power-up in default mode
Internal reference options
Support for low power sleep mode.
Example Applications
Refer to the driver examples directory for various example applications that exercise the different features of the driver. Each application is linked in the table below. The following sections describe the usage and expected output of the various applications. These example applications can be imported into the Vitis IDE from the Board Support Package settings tab.
Links to Examples
Examples Path:
https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/sysmonpsu/examples
Test Name | Example Source | Description |
|---|---|---|
Polled Example | This is a polled mode example in which shows the usage of the driver/device in polled mode to check the on-chip temperature and voltages. | |
Interrupt Example | This is an interrupt mode example in which shows the usage of the driver/device in interrupt mode to handle on-chip temperature and voltage alarm interrupts. | |
Low Level Example | This example shows the usage of the basic functions driver in polled mode to check the on-chip temperature and voltages. | |
Single Channel Interrupt Example | This example shows the usage of the driver/device in single channel interrupt mode to handle End of Conversion (EOC) and VCCINT alarm interrupts. | |
AMS Example | This example is used to measure AMS control block voltages via single channel sequencer off mode. |
Changelog
https://github.com/Xilinx/embeddedsw/commits/master/XilinxProcessorIPLib/drivers/sysmonpsu
Related Links
NA