Introduction
The AXI Quad Serial Peripheral Interface connects the AXI4 interface to those SPI slave devices which are supporting the Dual or Quad SPI protocol along with Standard SPI protocol instruction set.
Configuration
CONFIG_SPI=y CONFIG_DM_SPI=y
Device tree
axi_quad_spi@44a00000 {
bits-per-word = <8>;
compatible = "xlnx,axi-quad-spi-3.2", "xlnx,xps-spi-2.00.a";
fifo-size = <256>;
interrupt-names = "ip2intc_irpt";
interrupt-parent = <µblaze_0_axi_intc>;
interrupts = <4 0>;
num-cs = <0x2>;
reg = <0x44a00000 0x10000>;
xlnx,num-ss-bits = <0x2>;
xlnx,spi-mode = <2>;
xlnx,startup-block ;
};
Features
- Configurable SPI modes:
- Standard SPI mode
- Dual SPI mode
- Quad SPI mode
- Programmable SPI clock phase and polarity
- Configurable FIFO depth (16 or 256 element deep in Dual/Quad/Standard SPI mode)
- Configurable Slave Memories in dual and quad modes