• This page gives an overview of the bare-metal driver support for the Xilinx® LogiCORE™ IP AXI Ethernet Lite Media Access Controller (MAC) soft IP.   

  
  

  Table of Contents

  Table of Contents
  exclude Table of Contents

  Introduction

• 
  The AXI Ethernet Lite core is a soft Xilinx IP core for use with the Xilinx Vivado® Design Suite. The Xilinx® LogiCORE™ IP AXI Ethernet Lite Media Access Controller (MAC) core is designed to incorporate the applicable features
  described in the IEEE Std. 802.3 Media Independent Interface (MII) specification. It communicates with the processor using the AXI4 or AXI4-Lite interface. The core supports a 10 Mb/s and 100 Mb/s (also known as Fast Ethernet) interface.

How to enable

• For more information, please refer to the AXI Ethernet Lite product page which includes links to the official documentation and resource utilization. 

  Driver Sources

  The source code for the driver is included with the Vitis Unified Software Platform installation, as well as being available in the Xilinx Github repository. 

  <If there are multiple drivers supporting this IP, we should make that statement here and add to the table>

  
  

  Driver Name	Path in Vitis	Path in Github
  emaclite	<Vitis Install Directory>/data/embedded/XilinxProcessorIPLib/drivers/emaclite_<version>	https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/emaclite

  
  

  Info
  Note: To view the sources for a particular release, use the rel-version tag in github.  For example, for the 2020.1 release, the proper version of the code is: https://github.com/Xilinx/embeddedsw/tree/xilinx-v2020.1/XilinxProcessorIPLib/drivers/emaclite

• 
  

  The driver source code is organized into different folders.

•   The table below shows the emaclite driver source organization. 

• 
  

  Directory

• Description

• doc

• Provides the API and data structure details

• data

• Driver .tcl and

• .mdd file

• examples

  Example applications that show how to use the driver

• features
  src	Driver source files

Features Supported

Controller Features

• Parameterized AXI4 slave interface based on the AXI4 or AXI4-Lite specification for transmit and receive data dual port memory access
• Media Independent Interface (MII) for connection to external 10/100 Mb/s PHY transceivers
• Independent internal 2K byte TX and RX dual port memory for holding data for one packet
• Optional dual buffer memories, 4K byte ping-pong, for TX and RX
• Receive and Transmit Interrupts support
• Optional Management Data Input/Output (MDIO) interface for PHY access
• Internal loopback support

Standalone Driver Supported Features

• 
  

  Driver Implementation

  For a full list of features supported by this IP, please refer to the  AXI Ethernet Lite product page.  

  
  

  Features
  
  

  The AXI Emaclite Standalone driver supports the following features: 
  

  • Supports Internal loopback mode
  • Supports Ping pong buffers for both RX and TX
  • Supports MII for connection to external 10/100
  Mb/s
  • Mbps PHY transceivers
  • Supports accessing of PHY through MDIO interface.

  Known Issues and Limitations

  • All IP features are supported.

  Example Design Architecture 

  The examples assumes AXI Ethernet IP has number of TX and RX buffer=1 , Internal loopback and MII management module is enabled. For interrupt examples interrupt controller should be connected to processor.

• Image Added

  
  

  
  

  Example Applications

  Refer

  below pah for testing different examples for each feature of the IP.

  to the driver examples directory for various example applications that exercise the different features of the driver. Each application is linked in the table below. The following sections describe the usage and expected output of the various applications.  These example applications can be imported into the Vitis IDE from the Board Support Package  settings tab. 

  Links to Examples

  Examples Path: https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/emaclite/examples

  
  

  Test Name	Example Source	Description
  Self Test	xemaclite_selftest_example.c

• This example performs the self-test on the emaclite device example does a write to Tx

• buffer and read back's to

• verify similarly write to Rx buffer and read back's to verify.
  Internal loopback	xemaclite_internal_loopback_example.c

• This is an interrupt example

• outlines the use of interrupts and callbacks in the transmission/reception of Ethernet frames using internal

• loopback with an incrementing payload from 1 byte to 1500 bytes (excluding Ethernet Header and FCS).
  Frame transfer with interrupts	xemaclite_intr_example.c

• This

• interrupt example

• outlines the use of interrupts and callbacks in the transmission/reception of an Ethernet frame of 1000 bytes of payload. If the MDIO interface is NOT configured in the EmacLite core then this example will transmit a frame. If the MDIO interface is configured in the EmacLite core then this example will enable the MAC loopback in the PHY device, then transmit the frame and compare the received frame.

  Frame transfer with polling

  xemaclite_polled_example.c

• This

• polled mode example

• outlines the transmission/reception of an Ethernet frame of 1000 bytes of payload. If the MDIO interface is NOT configured in the EmacLite core then this example will transmit a frame. If the MDIO interface is configured in the EmacLite core then this example will enable the MAC loopback in the PHY device, then transmit the frame and compare the received frame.
  PHY loopback	xemaclite_phy_loopback_example.c

• This is an interrupt example outlining the use of interrupts and callbacks in the transmission/reception of Ethernet frames using MAC loop back in the PHY device with an incrementing payload from 1 byte to 1500 bytes (excluding Ethernet Header and FCS).

• Ping request	xemaclite_ping_req_example.c

• 	This is an EmacLite Ping request example in polled mode. This example will generate a ping request for the specified IP address.
  Ping reply	xemaclite_ping_reply_example.c

• None

• None

• None

• This is an EmacLite ping reply example in polled mode. This example will generate a ping reply when it receives a ping request packet from the external world.

Known issues and Limitations

• All IP features are supported.

Change Log

2020.2

• Support parallel make execution.
• Fix dependencies.props to add missing ".c" extension.
• Fix selftest failure on ZU+.

4dc85994d6fb Makefile: Remove realpath command
a24b04fe7e38 emaclite: Modify makefile to support parallel make execution
59d275a41e8b emaclite: In dependencies.props fix missing ".c" extension for xemaclite_internal_loopback_example.
cd57849309d7 emaclite: Use correct data type(u32) for To32Ptr

2020.1

• None

2019.2

• None

• None

• Example Application Usage

  Self Test

  This example performs the self-test on the emaclite device example and does a write/read on Tx and Rx ping pong buffers.

  Expected Output

  Code Block
  theme Midnight
  Successfully ran Emaclite selftest Example

  Internal loopback

  This is an interrupt example outlining the use of interrupts and callbacks in the transmission/reception of Ethernet frames using internal loopback with an incrementing payload from 1 byte to 1500 bytes.

  NOTE- In internal loopback mode, the AXI Ethernet Lite MAC core routes back data on the TX lines to the RX lines.

  Expected Output

  Code Block
  theme Midnight
  Successfully ran Emaclite internal loopback Example

  Frame transfer with interrupts

  This example demonstrates how to transfer packets with interrupts in emaclite phy loopback mode.

  Expected Output

  Code Block
  theme Midnight
  Successfully ran Emaclite interrupt Example

  Frame transfer with polling

  This example demonstrates how to transfer packets with polling in emaclite phy loopback mode.

  Expected Output

  Code Block
  theme Midnight
  Successfully ran Emaclite polled Example

  PHY loopback

  This example demonstrates how to transfer packets with interrupts in emaclite phy loopback mode. If MDIO is not configured a failure is returned.

  Expected Output

  Code Block
  theme Midnight
  Successfully ran Emaclite phy loopback Example

  Ping request

  This example generate a ping request for the specified IP address.

  Expected Output

  Code Block
  theme Midnight
  Successfully ran Emaclite ping request Example

  Ping reply

  This example generate a ping reply when it receives a ping request packet from the external world.

  Expected Output

  Code Block
  theme Midnight
  Successfully ran Emaclite ping reply Example

  Change Log

  2021.1

  None

  2020.2

  https://github.com/Xilinx/embeddedsw/blob/xilinx-v2020.2/doc/ChangeLog#L439

  2020.1

  None

  2019.2

  None

  Related Links

  • http://www.wiki.xilinx.com/Baremetal+Drivers+and+Libraries