Introduction

This page gives an overview of mutex driver which is available as part of the Xilinx Vivado and SDK distribution.

In a multi-processor environment, the processors share common resources. The Mutex core provides a mechanism for mutual exclusion to enable one process to gain exclusive access to a particular resource.
The Mutex core contains a configurable number of mutexes.
Each of these can be associated with a 32-bit user configuration register to store arbitrary data.

How to enable

Source Path for the driver
https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/mutex
Driver source code is organized into different folders. Below diagram shows the axivdma driver source organization
Mutex
|
-- Doc - Provides the API and data structure details
|
- Examples - Reference application to show how to use the driver APIs and calling sequence
|
- Source - Driver source files

Features supported
Controller Features
• Configurable number of AXI4-Lite interfaces from 0 to 8
• Configurable asynchronous or synchronous interface operation
• Configurable USER register
• Configurable number of mutexes
• Configurable CPUID width
• Configurable enhanced security through hardware identification support

Standalone Driver Supported Features

The Mutex driver support the below things.

• Configurable number of AXI4-Lite interfaces from 0 to 8
• Configurable asynchronous or synchronous interface operation
• Configurable USER register
• Configurable number of mutexes
• Configurable CPUID width
• Configurable enhanced security through hardware identification support

Features not supported

• None

Test cases
Mutex example
Mutex is used in from one processor to prevent locking from the other processor can be tested by selecting xmutex_tapp_example.c
Refer to https://github.com/Xilinx/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/mutex/examples/readme.txtor more information.

Known Issues/Limitations

• None

Change log

2017.1

• None

2017.2

• None

2017.3

• None