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Features Supported
The controller driver will be exclusive to LQSPI including API’s to be used for configuring the host controller and transmitting the data.Commands Supported:
The following list of basic commands are supported by the Standalone driver:- Read Identification
- Read Page
- Program Page
- Erase (Chip/Sector Erase)
- Read Status
Controller Features Supported:
The following features are supported in the QSPI Standalone driver.- IO access
- Legacy SPI mode
- Linear addressing mode
- Control of two chip selects/bus
- Configurable clock
- Configurable bus width
- Interrupts – will be chosen and enabled internally
Example Applications:
- Generic register read/write operations
- 3 byte addressing
- Flash configurations illustrated in examples – Single, Dual Stacked, Dual Parallel
Known issues and Limitations
Test cases
Sample output of test cases that are taken from examples folderQSPIPS FLASH Polled Example Test Successfully ran QSPIPS FLASH Polled Example Test |
QSPIPS FLASH Interrupt Example Test Successfully ran QSPIPS FLASH Interrupt Example Test |
Performance Details
Single
Qspips write throughput is 362 KBPSQspips read throughput is 27675 KBPS
Dual-Parallel
Qspips write throughput is 644 KBPSQspips read throughput is 33573 KBPS
Change Log
2016.3
- None
2016.4
- None
2017.1
- None
2017.2
- None
2017.3
2017.4
- None
2018.1
- None
2018.2
- None
2018.3
- Summary
- Added support for low density ISSI flash parts of size 8/16/32/64Mb
- Commits
- Summary
2019.1
2019.2
- None
2020.1
2020.2
Related Links
- Title 1 & Link 1
- Title 1 & Link 1