toc
Introduction
This page gives an overview of
sdps driver which is available as part of the Xilinx Vivado and SDK distribution.Source path for the driver:the bare-metal driver support for the Xilinx® LogiCORE™ IP Arasan SD 2.0 host controller.
Table of Contents
| Table of Contents | ||
|---|---|---|
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Introduction
The SD/SDIO controller communicates with SDIO devices, SD memory cards, and MMC cards with up to four data lines. On the SD interface, one (DAT0) or four (DAT0-DAT3) lines can be used for data transfer. The SDIO interface can be routed through the MIO multiplexer to the MIO pins or through the EMIO to Select IO pin in the PL. The controller can support SD and SDIO applications in a wide range of portable low-power applications such as 802.11 devices, GPS, WiMAX, UWB, and others.The SD/SDIO controller is compatible with the standard SD Host Controller Specification Version 2.0 Part A2 with SDMA (single operation DMA), ADMA1 (4 KB boundary limited DMA), and ADMA2 (ADMA2 allows data of any location and any size to be transferred in a 32-bit system memory-scatter-gather DMA) support. The core also supports up to seven functions in SD1, SD4, but does not support SPI mode. The Zynq-7000 SoC is expected to work with eMMC devices because the protocol is the same as SD, but this has not been extensively verified. Users must be careful to meet all timing requirements as they might or might not comply with eMMC. It does support SD high-speed (SDHS) and SD High Capacity (SDHC) card standards. The user should be familiar with the SD2.0/SDIO 2.0 specifications. The SD/SDIO controller also supports MMC3.31 standard. eMMC flash memories are not primary boot devices for Zynq-7000
family, but can be used as secondary boot devices.
The SD/SDIO controller is accessed by the Arm processor via the AHB bus. The controller also includes a DMA unit with an internal FIFO to meet throughput requirements.
Driver Sources
The source code for the driver is included with the Vitis Unified Software Platform installation, as well as being available in the Xilinx Github repository.
| Driver Name | Path to Vitis | Path in Github |
|---|---|---|
| sdps | <Vitis Install Directory>/data/embedded/XilinxProcessorIPLib/drivers/sdps | https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/sdps/ |
| Info |
|---|
Note: To view the sources for a particular release, use the rel-version tag in github. For example, for the 2020.1 release, the proper version of the code is: https://github.com/Xilinx/ |
Driver
embeddedsw/tree/xilinx-v2020.1/XilinxProcessorIPLib/drivers/sdps |
The driver source code is organized into different folders.
Below diagramThe table below shows the sdps driver source organization.
Directory |
|---|
Description |
|---|
doc |
Provides the API and data structure details |
|
- Source - Driver source files
Features Supported by HW/SW
data | Driver .tcl, .mdd and .yaml file |
examples | Example applications that show how to use the driver features |
| src | Driver source files, make and cmakelists file |
Note: AMD Xilinx embeddedsw build flow has been changed from 2023.2 release to adapt to the new system device tree based flow. For further information, refer to the wiki link Porting embeddedsw components to system device tree (SDT) based flow
The .yaml(in data folder) and CMakeLists.txt(in src folder) files are needed for the System Device Tree based flow. The Driver .tcl and .mdd files are for the older build flow which will be deprecated in future.
Driver Implementation
For a full list of features supported by this IP, please refer Chapter 73: SD/SDIO Controller in Zynq TRM.
Features
- 1 or 4 bit bus width
- Normal or High speed (and configurable clock)
- ADMA2 transfers
- Polled mode
- Switch command
- All ACMD’s and CMD’s involved in initialization and transfer states
- Configurable block sizeBlock and direct addressable
- Error detection
Features Not Supported
- SDMA mode
- Programmed IO mode
- Interrupts
- Lock/Unlock/Write protection
Known issues and Limitations
- Driver supports only polled mode.
Example Applications
Refer to the driver examples directory for various example applications that exercise the different features of the driver. Each application is linked in the table below. The following sections describe the usage and expected output of the various applications. These example applications can be imported into the Vitis IDE from the Board Support Package settings tab.
Links to Examples
Examples Path:
Test cases
...
https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/sdps/examples
Test Name | Example Source | Description |
|---|---|---|
| SDPS Read and Write example without file system | This examples does basic raw read and write test from SD/eMMC device in Polled mode. | |
| Read and Write example with file system (using XILFFS library) | This examples does basic file system |
...
Changelog
2016.3
- Added support for mkfs in the sd driver. It will calculate the sector size and number of sectors to identify the card capacity.
- Used usleep API across all the platforms, since MB_SLEEP API is deprecated.
- Added bus_width, mio_bank and has_emio parameters to tcl file to export to xparameters.h
- Added support for UHS mode switching based on the card capability.
- Added Tap delays inside the drivers required for High Speed modes and UHS modes.
2016.4
- Reduce the delay during power cycle from one second to one milli second.
- Used emmc_hwreset pin to reset eMMC card rather than relying on power cycle.
- Enable Rst_n bit in EXT_CSD reg if disabled - This is to enable hw reset functionality in eMMC device.
- Implemented revived auto-tuning workaround by implementing dll_reset during tuning process.
...
2017.1
- None
2017.2
- None
2017.3
- Added support for word access system
- Resolved compilation issues with ARMCC and ICCARM compilers
...
| read and write test from SD/eMMC device in Polled mode. |
Example Application Usage
SDPS Read and Write example without file system
This examples does basic raw read and write test from SD/eMMC device in Polled mode.
Expected Output
| Code Block |
|---|
SD Raw Read/ Write Test
Successfully ran SD Raw Read/ Write Test |
Read and Write example with file system (using XILFFS library)
This examples does basic file system read and write test from SD/eMMC device in Polled mode.
Expected Output
| Code Block |
|---|
SD Polled File System Example Test
Successfully ran SD Polled File System Example Test |
Example Design Architecture
NA
Performance
SD card : Sandisk Ultra 16GB SDHC card
Zynq:
| High speed | 20.54 MB/sec |
Changelog
2023.2
https://github.com/Xilinx/embeddedsw/blob/xlnx_rel_v2023.2/doc/ChangeLog#L601
2023.1
None
2022.2
https://github.com/Xilinx/embeddedsw/blob/xlnx_rel_v2022.2/doc/ChangeLog#L140
2022.1
https://github.com/Xilinx/embeddedsw/blob/xlnx_rel_v2022.1/doc/ChangeLog#L98
2021.2
None
2021.1
None
2020.2
None
2020.1
None
2019.2
https://github.com/Xilinx/embeddedsw/blob/xilinx-v2019.2/doc/ChangeLog#L20
2019.1
None
2018.
...
3
None
2018.
...
2
None
...
2018.1
None
...
2017.
...
- Added cache invalidation after getting bus width information as ARM suggested.
2020.1
- None
...
4
https://github.com/Xilinx/embeddedsw/blob/xilinx-v2017.4/doc/ChangeLog#L18
2017.3
https://github.com/Xilinx/embeddedsw/blob/xilinx-v2017.3/doc/ChangeLog#L329
2017.2
None
2021.1
...
2017.1
https://github.com/Xilinx/embeddedsw/blob/xilinx-v2017.1/doc/ChangeLog#L326
2016.4
https://github.com/Xilinx/embeddedsw/blob/xilinx-v2016.4/doc/ChangeLog#L44
2016.3
https://github.com/Xilinx/embeddedsw/blob/xilinx-v2016.3/doc/ChangeLog#L178