...
Topic | Description | Development Board | Links | Latest Version |
---|---|---|---|---|
Boot Time From Dual Parallel QSPI | The goal is to be able to build a VCK190 design (QSPI dual Parallel) to reproduce the boot times outlined in the boot time estimator spreadsheet. | VCK190 | 2021.1 | |
Fallback & Multiboot | Fallback boot allows Versal Adaptive SoC to automatically boot a different PDI than the initial PDI on the same primary boot device if the first PDI fails to boot. | VCK190 | 2022.1 | |
Post BootROM State | This Versal example design is intended to illustrate the post bootROM state (pre-PLM) of the device on different boot modes, just to verify the registers modified by Versal ROM code. | VCK190 | https://github.com/Xilinx-Wiki-Projects/VCK190-Boot/tree/master/vck190_post_boot | 2020.2 |
Boot Files | This blog post provides an overview of the Versal Boot files | VCK190, VMK180, VPK120, VPK180 | 2020.2 | |
USB Secondary Boot Mode | In this blog entry we will demonstrate how to boot Linux from a USB secondary boot | VCK190 | 2022.1 | |
JTAG Boot | Vivado in-depth tutorial covering the JTAG boot mode flow | VCK190 | https://github.com/Xilinx/Vivado-Design-Tutorials/tree/master/Device_Architecture_Tutorials/Versal/Boot_and_Config/JTAG_Boot 2020at 2021.2 · Xilinx/Vivado-Design-Tutorials (github.com) | 2021.2 |
OSPI Boot | Example demonstrating octal SPI (OSPI) boot on a VCK190. | VCK190 | 2023.1 | |
PDI Compression | This Versal example design will demonstrate how to generate a compressed and uncompressed PDI for the VCK190. | VCK190 | https://github.com/Xilinx-Wiki-Projects/VCK190-Boot/tree/master/vck190_boot_compression | 2020.2 |
...