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Driver Sources
The source code for the driver is included with the Vitis Unified Software Platform installation, as well as being available in the Xilinx Github repository.
| Driver name | Path in Vitis | Path in Github |
|---|---|---|
| canps | <Vitis Install Directory>/data/embedded/XilinxProcessorIPLib/drivers/canps | https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/canps |
| Info |
|---|
Note: To view the sources for a particular release, use the rel-version tag in github. For example, for the 2020.1 release, the proper version of the code is: https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/canps |
The driver source code is organized into different folders. The table below shows the canps driver source organization.
| Directory | Description |
|---|---|
| src | Driver source files |
| examples | Example applications that show how to use the driver features |
| doc | Provides the API and data structure details |
| data | Driver .tcl, .yaml and .mdd file |
Driver Implementation
For a full list of features supported by this IP, please refer Chapter 20: Can Controller in Zynqmp Trm
Features
Controller Features:
- Compatible with the ISO 11898 -1, CAN 2.0A, and CAN 2.0B standards
- Standard (11-bit identifier) and extended (29-bit identifier) frames
- Bit rates up to 1 Mb/s
- Transmit message FIFO (TxFIFO) with a depth of 64 messages
- Transmit prioritization through one high-priority transmit buffer (TxHPB
- Watermark interrupts for TxFIFO and RxFIFO
- Automatic re-transmission on errors or arbitration loss in normal mode
- Receive message FIFO (RxFIFO) with a depth of 64 messages
- Four Rx acceptance filters with enables, masks and IDs
- Loop back and snoop modes for diagnostic applications
- Mask able error and status interrupts
- 16-Bit time stamping for receive message
- Readable Rx/Tx error counters
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Canps polled mode test
https://github.com/Xilinx/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/canps/examples/xcanps_polled_example.cIt configures the CAN controller in loop back mode with no interrupt enabled and verifies the data received with data sent
| Code Block | ||
|---|---|---|
| ||
Polled Mode test:: CAN Polled Mode Example Test Successfully ran CAN Polled Mode Example Test |
Canps interrupt mode test
https://github.com/Xilinx/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/canps/examples/xcanps_intr_example.cIt configures the CAN controller in loop back mode with interrupts enabled and verifies the data received with data sent
| Code Block | ||
|---|---|---|
| ||
Interrupt Mode test: CAN Interrupt Example Test Successfully ran CAN Interrupt Example Test |
Canps water mark interrupt test
https://github.com/Xilinx/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/canps/examples/xcanps_watermark_intr_example.cIt configures the CAN controller in loop back mode with rx and tx water mark interrupts enabled with some RX and TX threshold.
| Code Block | ||
|---|---|---|
| ||
Water Mark Test: CAN Watermark Example Test Successfully ran CAN Watermark Example Test |
Change Log
2023.2
2022.2
- None
2022.1
- None
2021.2
- None
2021.1
2020.2
2020.1
2019.2
2019.1
Related Links
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